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March 2004

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Subject:
From:
"Morse, Carrie" <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Wed, 10 Mar 2004 15:39:57 -0500
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We have some unpopulated bare boards that are white tin plated with
SMOBC.  The boards are exhibiting peeling mask at the interface between
the tin pad (TH and SMT) and the mask along the circuit runs.  Per IPC
A610 , exposed copper is not acceptable in this case.  Can anyone
provide possible root causes to this phenomena?  The boards are date
coded from Oct 2003 as well as Feb 2004.  Both lots exhibit the exposed
copper/missing mask.  These boards were also stored in a Temp/RH of
about 70F/10-15%RH
 
TIA
-Carrie

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