Hi Erni,
Check Chip Scale Review Dec. 2000, p65, for an article by Dr. Reza
Ghaffarian who demonstrates some mechanical
deflection tests.

Paul Signorelli

Paul Signorelli
Reliability Engineer
Sanmina-SCI Corporation, Plant 432
702 Bandley Dr.
Fountain, CO 80817

eMail address: [log in to unmask]
Phone: 719-382-2352,   Fax: 719-382-2520

>>> [log in to unmask] 01/19/04 10:01AM >>>
We are currently looking for a way to measure PCB / chip component
stress
during our assembly process, especially depanelization. We would like
to
get an idea of what amount of stress (flex) the boards are undergoing.
We
would also like to use this to compare a few different processes--for
example router depaneling compared to cutter depaneling as well as
manual
depaneling.
But we are now facing several problem:
1. How much "stress" (or flex) is too much, for both PCB and chip
components near the PCB edge?
2. What equipment could be used to make an accurate measurement?
3. Any simular test is done before?

Thanks,
Ernie Fung

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