Ken,
You may want to log on to the DESSC site and down load MIL-PRF-123 (MLCC)
and MIL-PRF-49470a (Switch Mode Arrays) and take a look there for guidance.
Remember these specifications are mainly approved by the vendors so don't
be too surprised if a .1" long chip out is acceptable for power supply
parts. Perhaps another vendor is in order though as these sound like huge
chip outs that can lead to spectacular failures.

John Maxwell

At 02:39 PM 12/3/2003 -0800, you wrote:
>We are trying to make a determination of potential long term damage caused
>by small chips in large multilayer ceramic capacitors (MLCC). We're talking
>about leaded, .60" X .120", stacked three high MLCC's. The obvious chips
>that we are rejecting are at the edge with the top surface area of about .1"
>X .05" X .01" deep.
>
>IPC-A-610 talks a little bit about chips and cracks to small chip components
>but does not really address these big guys. It has been our experience in
>the past that any crack (chip) can propagate, particularly with moisture
>present, into a rather exciting failure.
>
>The thing we are having trouble with is defining what is an acceptable
>appearance for these parts. The chip may not go down to the substrate but
>we're still concerned about long term effects on the ceramic. If any of you
>can point us to a document that might provide some guidance it sure would
>appreciated.
>
>Thanks,
>
>Ken Bloomquist
>
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