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November 2003

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Subject:
From:
"Marsico, James" <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Mon, 17 Nov 2003 15:41:02 -0500
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Hello, Technet...
A quick question (or two, maybe three)...  We're designing a small
double-sided SMT PWB which is somewhat dense.  The designer has to place
plated through vias under some of the small chip components.  Our only
option is to tent over these vias with solder mask.  My question is what's
the best S.M. for this application and what's the max size hole it can be
used on.  Is it best to tent over both sides of the via or just one?
Thanks for your help,

Jim Marsico
Senior Engineer
Production Engineering
EDO Electronics Systems Group
[log in to unmask] <mailto:[log in to unmask]>
631-595-5879

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