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Subject:
From:
John Parsons <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Wed, 19 Nov 2003 12:59:43 -0800
Content-Type:
text/plain
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text/plain (150 lines)
Chris,

The board is double sided, not multilayer and from what I gather the other
layer will simply be another signal layer - trace direction unknown at this
time.

Thanks for your input.
Anyone else?

John
  -----Original Message-----
  From: Chris Robertson [mailto:[log in to unmask]]
  Sent: November 19, 2003 12:38 PM
  To: TechNet E-Mail Forum.; John Parsons
  Subject: Re: [TN] Co-planar Impedance Calculations


  What is the next layer? Signal? or is it a layer covered only by
dielectric.
  I would guess it is next to another signal layer that is of alternate
direction.
  Something like a coupled stripline?
  If you don't plan on going that route then your working on something I
wondered about.
  Can you treat a trace as an embedded microstrip....? I wonder.
  Sorry that is now out of my league, but I'm very interested in hearing
what you find.

  Chris Robertson
  [log in to unmask]
    ----- Original Message -----
    From: John Parsons
    To: [log in to unmask]
    Sent: Wednesday, November 19, 2003 2:07 PM
    Subject: Re: [TN] Co-planar Impedance Calculations


    Chris,

    I hear what you are saying, and yes, I used the word "ground" out of
habit.
    My confusion though lies in the fact that there will be no reference
plane
    below the signal trace (hence coplanar) and that the designer seems to
think
    that they (end user) only want the reference line on one side of the
signal
    line.

    When I try and use the Polar calculator with the parameters given below,
and
    I deselect the "plane" radio buttons it tells me that I need a reference
    line width of at least 10x the dielectric thickness, which is 62mil) or
10x
    the coplanar separation.

    Again, to clarify, my confusion is in the fact that I do not have
reference
    "plane" surrounding the signal trace.  I need to understand how the
proposed
    design will work, and how to reconcile the calculations before
    manufacturing.

    Thanks
    John
      -----Original Message-----
      From: Chris Robertson [mailto:[log in to unmask]]
      Sent: November 19, 2003 11:48 AM
      To: TechNet E-Mail Forum.; John Parsons
      Subject: Re: [TN] Co-planar Impedance Calculations


      It doesn't have to be ground. That is why they are always called
reference
    planes.
      I personally use + and - voltages with no problems. I also have used
split
    planes
      above and below, but I also recommend not to use split plane reference
    planes in
      the areas where controlled impedance traces are or on very high
    frequencies.
      This is just my personal findings.
      I like the polar calculator and actually compared my calculator on
their
    findings.
      Go to www.pcbdr.com and get the spread sheet calculator. or directly
to
      http://home.hiwaay.net/~robdne/files/Beta%20ResourceV4.xls to use the
      calculator online. (click on the "stack" tab at the bottom)
      The updated version is much better. These calculate the entire board
and
      adds the thickness on the fly.

      Chris Robertson
      Author "PCB Designer's Reference"
      [log in to unmask]
      ISBN: 0130674818
      Search for it at www.Amazon.com

        ----- Original Message -----
        From: John Parsons
        To: [log in to unmask]
        Sent: Wednesday, November 19, 2003 1:14 PM
        Subject: [TN] Co-planar Impedance Calculations


        Greetings all,

        I have a customer who is doing an impedance design for Intel and he
has
    no
        previous impedance experience.  This is the information I have.

        - double sided board
        - target impedance 50ohm
        - signal line 5mil wide, spaced 5mil from "ground" trace and this
pair
    of
        traces should be spaced a minimum of 20mil from adjacent traces.

        This is what he was given from Intel.  I am using an older Polar
model
        (CITS25 calculator) which does have models for co-planar designs but
    from
        what I can tell they assume that the signal trace is sandwiched
between
        ground (return lines) on both sides.  Is this a correct
interpretation?
    Is
        it possible to model the design as described above?

        While we have some experience with controlled impedance I have no
    experience
        with the aforementioned design and could use some assistance.

        Best Regards
        John Parsons


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