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Reply To: | TechNet E-Mail Forum. |
Date: | Wed, 12 Nov 2003 15:57:20 -0000 |
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Hi, the boards could fail if an overetched condition or nicks (insufficient
X-sectional area) exists on that particular layer.
suggestion: try to find out how much current these traces conduct under
operating conditions and then, using a good quality DC powersupply load the
traces in question to about 130% (or whatever number your engineers are
comfortable with) of peak operating current.
The fact that all failures appear on the same layer makes this failuremode
somewhat likely.
Wolfgang
----- Original Message -----
From: "Keith Calhoun" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Wednesday, November 12, 2003 3:15 PM
Subject: [TN] Inner layer open trace
> hoping that Technet could once again help me with a vexing problem. We
> have had a number of boards which have been returned from the field that
> fail during our testing. We have identified the problem as an open
> trace on an inner layer between one or more IC's and the card edge
> connector. All of these opens appear to be found on the same inner
> layer, and all the boards which show this failure have the same date
> code on the bare boards. We have tried to have these boards x-rayed to
> determine if we could find any problems, but we were unable to locate
> any problems. We can identify the area on the boards as being somewhere
> in about a 2-3 sq. in. area. I am interested in finding out about any
> other methods, sources, etc which we can use prior to destructive
> investigation of this problem. Again your help is greatly appreciated.
>
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Technet Mail List provided as a service by IPC using LISTSERV 1.8e
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To receive ONE mailing per day of all the posts: send e-mail to [log in to unmask]: SET Technet Digest
Search the archives of previous posts at: http://listserv.ipc.org/archives
Please visit IPC web site http://www.ipc.org/contentpage.asp?Pageid=4.3.16 for additional information, or contact Keach Sasamori at [log in to unmask] or 847-509-9700 ext.5315
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