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October 2003

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Subject:
From:
"Whittaker, Dewey (AZ75)" <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Fri, 24 Oct 2003 07:49:33 -0700
Content-Type:
text/plain
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text/plain (58 lines)
Paul,
For hi-rel applications,we believe that if you can't clean the vias,you need
to fully plug or tent both sidesof the via.There is nothing in between.You
must choose a robust process for tenting,because you can never allow an
open.You don't know when it happened so you don't know what may be lurking
in yonder walls.
Dewey

> -----Original Message-----
> From: Paul Baine [SMTP:[log in to unmask]]
> Sent: Friday, October 24, 2003 7:31 AM
> To:   [log in to unmask]
> Subject:      [TN] Cleaning of via holes under components
>
> Hello,
>
> One of our Design Engineers is designing a surface mount PCB
> assembly and would prefer not to have the via holes solder mask
> tented.  However, he is concerned that, if he does not call up
> solder mask tenting on his bare PCB drawing, foreign matter could
> find its way into a via hole and, if a component (e.g. an IC) was
> mounted over the via hole, the foreign matter might not be removed
> during the cleaning process.
>
> Has anyone had experience with this situation?  I would appreciate
> any help you could give me.
>
> Thanks very much in advance.
>
> Paul Baine
> Q.A. Manager
> C-Tech Ltd.
> Cornwall, Ontario, Canada
>
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