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September 2003

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Subject:
From:
"Brooks,Bill" <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Mon, 29 Sep 2003 09:15:03 -0700
Content-Type:
text/plain
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text/plain (35 lines)
There is a method for larger boards the plates the side of the board and
then comes back with a router bit and selectively removes copper on the edge
to form pins. Hughes Circuits in San Marcos, California has done this
before, however the board I did was too small to use that technique.


Bill Brooks
"Politics is more difficult than Physics" - Albert Einstein

-----Original Message-----
From: Croslin, Robert [mailto:[log in to unmask]]
Sent: Monday, September 29, 2003 6:30 AM
To: [log in to unmask]
Subject: Re: [TN] Selective Edge Plating

Ofer, what you describe was my second suggestion as well as several others
from TechNet.  They claim there's not enough space to do the castellating
type of layout and it has to be on a smooth side.  Several Technetters
responded with requests to see the files in hopes of quoting.  I'll let
everyone know how this one turns out.

Thanks,

Bob

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