"Miswald, Ron" wrote:
>
> Our board house is raising a flag about our IPC-356 netlists.  Their concern
> is that we short various grounds due to short comings in out layout
> software.  As an example we have digital ground, 1.8V crystal ground, and
> 3.3V crystal ground segregated until they tie together (short) at the power
> supply.

        This problem is inherent in most folks' design methods.
        Once you get to fab, there can be no such thing as an
        intentional short.  These things cause phone calls, or
        worse.  For this reason we had to cook up a way to bridge
        the engineer's intent with the reality of the CAD system.
        Admittedly a proprietary solution, we can map these items
        to understand the engineering need and produce correct
        reference files for fabrication.

>
> My question,  are there easy work arounds for the board house?  I do include
> a readme listing the ties, the nets they short, and their (x,y) locations.
>
        One possible quick solution is to record a macro in your
        editor of choice to combine the nets in your output IPC
        netlist file.  This is what you're asking the fab vendor
        to do but if I were they I'd be really really nervous
        about it - too nervous to be responsible in fact - as it
        stands they lack sufficient reference to prove they've
        done it correctly.

        In fact I wouldn't recommend this solution unless your
        process allows for final CAE/CAD comparison as well as an
        in-house Gerber to IPC compare.

        Good luck with this thorny issue, but props on trying to
        use the IPC netlist correctly.  It's tough but invaluable
        in my experience.
--

      Jeff Seeger                         Applied CAD Knowledge Inc
      Chief Technical Officer                  Tyngsboro, MA  01879
      jseeger "at" appliedcad "dot" com                978 649 9800

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