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August 2003

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Subject:
Re: Score to trace criteria
From:
Duane Shreve <[log in to unmask]>
Reply To:
[log in to unmask]
Date:
Mon, 4 Aug 2003 08:01:36 -0600
Content-Type:
text/plain
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text/plain (72 lines) 
Franklin,

IPC has a standard for this and it is covered in IPC-SM-782, I apologize
that I don't recall the rev level, but the standards do have an illustration
that deals with conductor to scoring clearance.

Duane

-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Tempea, Ioan
Sent: Monday, August 04, 2003 7:41 AM
To: [log in to unmask]
Subject: Re: [TN] Score to trace criteria


Franklin,

I can't refer you to any document, but I just had a few designs returned
from the PCB fab. The track to edge was 10 mils and they said 15 would be
OK.

Regards,
Ioan

> -----Original Message-----
> From: Franklin D Asbell [SMTP:[log in to unmask]]
> Sent: Monday, August 04, 2003 9:42 AM
> To:   [log in to unmask]
> Subject:      [TN] Score to trace criteria
>
> Is anyone aware of written criteria dealing with scored edge to trace edge
> criteria??? design criteria??? specification tolerance, etc etc
>
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To receive ONE mailing per day of all the posts: send e-mail to [log in to unmask]: SET Technet Digest
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