We started building product using these parts- QFN 32 (8 mm sq) and QFN


Motorola, National Semiconductor and Intersil all have useful
information on QFN. At a previous life, we found that extended the toe
to extend outside the periphery of the QFN package greatly assisted in
verifying solder deposition and reflow and also assisted in reworking
insufficient (we have vias in pad- another design flaw). We would run an
mini-wave tip around the periphery of the component.

The major problem we had was in printing thermal pads without
overprinting into thermal vias and getting insufficient solder.
According to National, you can have 80 % voiding in thermal pads without
sacrificing thermal dissipation.

would be interested in other's experiences

Tom Gervascio
Senior Process Engineer
Sparton Electronics
(352) 540-4040
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