Chris,
Labeling the layers is a great standard practice, but it seems to me that a
board would pass electrical test & the layer trace test even if layers were
out of order (unless buried/blind vias are used).

Regards,
Mark Hargreaves

        -----Original Message-----
        From:   Chris Robertson [SMTP:[log in to unmask]]
        Sent:   Thursday, July 10, 2003 8:51 AM
        To:     [log in to unmask]
        Subject:        Re: [TN] Board Stackup fabrication errors


        There are several methods to verify that the initial lay-up is
accurate, but implementing
        "in process" visuals really do help.

        Layer number block on each layer. (which shows the number of that
particular layer.)
        This does also help during manual lay-up. I feel that (if possible)
every board should
        have the layer numbered ON the layer.

        Electrical test can also be used for verification. Request that the
board house test
        the netlist from your original gerbers, and not the "clean up"
layers. That would only
        result in verification of an incorrect lay-up.

        A layer trace which connects each layer in order, is a simple
method, whereby you can
        probe the first and last pad and check for continuity.

        Chris Robertson
        Author "PCB Designer's Reference"
        [log in to unmask] <mailto:[log in to unmask]>



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