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July 2003

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Subject:
Re: Design guidelines CSP
From:
joyce <[log in to unmask]>
Reply To:
[log in to unmask]
Date:
Wed, 2 Jul 2003 07:52:32 -0400
Content-Type:
text/plain
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text/plain (55 lines) 
Siggi,
You should use the footprint layout put out by Altera.  I believe they
had good recommendations, specifically related to their product,  just
like Intel.  I wouldn't say the same thing for "other" chip
supplier....Altera engineer impress me.   My 2 cents.
Good luck...
                                                            jk

>-----Original Message-----
>From: TechNet [mailto:[log in to unmask]] On Behalf Of
>Zweigart, Siegmund
>Sent: Tuesday, July 01, 2003 3:26 AM
>To: [log in to unmask]
>Subject: [TN] Design guidelines CSP
>
>
>Hello All
>
>What are your recommendations regarding land pattern design
>for a Fine- Pitch Ball grid Array (FBGA) 12*11 mm 0.8 mm (31,8
>mil) pitch, 0.3 mm (12mil) ball diameter. We use at the moment
>a 12 mil land pattern and 12 mil stencil opening (6 mill
>thick). My main concerns are because of voiding in the solder joint.
>
>Any comments welcome
>
>Siggi
>
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