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May 2003

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Subject:
From:
Brian Ellis <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Thu, 15 May 2003 10:08:31 +0300
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Steve

To take the argument to the logical conclusion:

a) if epoxy is disallowed on a board, let's scrap the solder mask and
the legend :-)
b) you are only the executive: you did not design the stencil, but the
guys in the CAD department. Ask her to send her flak to them, not to you
and see what kind of response she gets. :-) (I know its a real PITA for
these guys to identify manually specific holes to be blocked).
Incidentally, who does the design? If it were your customer, then it's
his 100% responsibility.
c) if the customer has not complained on previous batches, then she has
had her legs amputated at the hips. Hint to her that over-zealous
inspectors don't last long in this life :-)

For the anecdote, I once saw something equally stupid at one of my
customers'. He had been wave-soldering circuits using RA flux, followed
by CFC-113 cleaning. After due testing, to phase out the CFC, they
decided to go to "no-clean" and did all the usual selection and
qualification process. A memo was sent to all departments that, on such
and such a date, the cleaner would be taken out of service and the new
flux used exclusively in production. The first batch was manufactured
and was sent to final inspection. Total batch rejection for visible flux
residues between adjacent solder pads. The chief inspector said that he
could tolerate flux residues anywhere except between solder joints! I
was told it took a few days and intervention from the production
director before the situation was made clear, but I'm sure that the
inspector ended up with a black mark on his personal file for his obstinacy.

Brian

PS I'd be happier :-) if you (and others) did not use HTML :-( on this
netlist

Steve Gregory wrote:
> Hi All!
>
> The fun never ends...
>
> I've been involved in a rather heated (albeit silly, I think...) debate
> with an inspector here, about adhesive being deposited where there is no
> component loaded.
>
> As you may surmise from my posts over the past few days, I stencil
> epoxy, not dispense. For some reason, the issue has come up with one of
> my inspectors here, requesting that I get something in writing from our
> customer saying that it's okay to have epoxy deposits at locations where
> there is no component loaded. I told her that I wasn't going to do it
> because I didn't want to look silly asking our customer if it was okay
> to have a glue dot at a location that's not loaded.
>
> Her reasoning is that we're putting something on the board that's not
> being called out on the bill of material. My response is that the epoxy
> isn't called out anyway, but we have to use it to be able to process
> this board that has PTH and SMT on the bottom. "But there's no component
> there, so there shouldn't be any glue there." was her response. "But it
> doesn't make any difference, it's a non-issue" I calmly replied.
>
> We've been debating this for 2-days now, and I'm about at my wits end.
> There's nothing in the -610 or the J-STD-001 that says it's defect, or
> that it's forbidden to deposit epoxy where a component isn't loaded, and
> there's nothing in the documentation from our customer to keep the
> unused areas free from epoxy. I've already spent much more time on this
> issue than I ever thought I would. Why this issue has popped-up now, I
> don't have a clue. Me thinks it's much ado about nothing.
>
> What is your take on this issue?
>
> -Steve Gregory- ---------------------------------------------------
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