Grant,
We have seen this same problem from more of our bare board suppliers lately.
I don't know what has happened, but it is alarming to see a sudden surge in
this issue. This has led (in our case, too) to a standoff between the board
houses and us: Them standing on the TM-650 measuring technique (which I find
to be strange at best - especially the referee method for twist in section
5.3), and us standing on the simple fact that we can't place SMT parts via
P&P equipment with more than a tiny bit (defined as 0.75% or less bow/twist
in IPC-610) of bow or twist. With everything getting smaller/tighter and
placement equipment becoming less tolerant of any twist or bow on the basic
playing field, I believe it is time to re-think the measurement requirements
and techniques for this board anomaly.
That, plus the fact that we have seen a sudden rise in this problem from
board vendors, means that the board shops will need to keep a closer eye on
the materials they get from their suppliers and the layering
techniques/processes that are used when building boards for the electronics
industry. Our manufacturing tolerances are becoming tighter each day and
they will have to make sure they follow the trend, or get left behind when
someone else steps up to the plate...
Sorry for my "downer attitude", but it an aggravating situation to be in. We
would like to build product for our customers, yet are hamstrung by this
problem. And it appears to be on the rise...
Dale Ritzen
Quality Manager
Austin Manufacturing Services
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Grant Emandien
Sent: Thursday, April 24, 2003 1:20 AM
To: [log in to unmask]
Subject: [TN] Warped boards
T'netters,
On the matter of warped boards we are currently experiencing this problem
(warpage appears to be in either direction i.e. to the solder or component
side, sometimes exhibits and S-curve), - we do not bake these boards to
remedy but rather reject and return, hence the stand-off with the pcb
fabricator who is insistent that it is within acceptable IPC stds. PCB
details are:
* PCBs are approx. 300mm x 135mm in area,
* made of std. Duraver E-Cu 104 (Tg of 135degC) from Isola (no further
details),
* exhibits relatively good copper balance on both sides, only about
20% of the surface is coppe,.
* is only exposed to wave solder heat - it appears that the wave heat
may also worsen the problem, so it may appear that stress is already present
(on good boards) in the material before wave.
Any experience of this material, what the fabricator's process may be
inducing and any other possible contributary factors?
Advice graciously received, TIA
Grant
**********************************************************************
Notice:
This email transmission contains confidential information which is the
property of the
sender and if you are not the intended recipient, you are hereby notified
that any
disclosure, copying or distribution of the contents of this e-mail
transmission, or the
taking of any action in reliance thereon or pursuant thereto, is strictly
prohibited.
Should you have received this e-mail in error, please notify us immediately
to arrange
for the return of the documentation comprising this transmission. No
warranty is given by
Tellumat (Pty) Ltd regarding the integrity of this e-mail, nor that this
e-mail is free
of viruses, interception or interference. Unless otherwise stated, any views
or opinions
contained in this e-mail are that of the sender. Tellumat (Pty) Ltd
furthermore disclaims
liability for any unauthorised opinion or representation made by the sender
purportedly
on behalf of Tellumat (Pty) Ltd. Accordingly, Tellumat (Pty) Ltd's
delegation of
authorities, setting out who may contract on behalf of Tellumat (Pty) Ltd,
is available
on request to the recipient.
**********************************************************************
---------------------------------------------------
Technet Mail List provided as a free service by IPC using LISTSERV 1.8e
To unsubscribe, send a message to [log in to unmask] with following text in
the BODY (NOT the subject field): SIGNOFF Technet
To temporarily halt or (re-start) delivery of Technet send e-mail to
[log in to unmask]: SET Technet NOMAIL or (MAIL)
To receive ONE mailing per day of all the posts: send e-mail to
[log in to unmask]: SET Technet Digest
Search the archives of previous posts at: http://listserv.ipc.org/archives
Please visit IPC web site http://www.ipc.org/html/forum.htm for additional
information, or contact Keach Sasamori at [log in to unmask] or 847-509-9700
ext.5315
-----------------------------------------------------
---------------------------------------------------
Technet Mail List provided as a free service by IPC using LISTSERV 1.8e
To unsubscribe, send a message to [log in to unmask] with following text in
the BODY (NOT the subject field): SIGNOFF Technet
To temporarily halt or (re-start) delivery of Technet send e-mail to [log in to unmask]: SET Technet NOMAIL or (MAIL)
To receive ONE mailing per day of all the posts: send e-mail to [log in to unmask]: SET Technet Digest
Search the archives of previous posts at: http://listserv.ipc.org/archives
Please visit IPC web site http://www.ipc.org/html/forum.htm for additional
information, or contact Keach Sasamori at [log in to unmask] or 847-509-9700 ext.5315
-----------------------------------------------------
|
