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February 2003

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"TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
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Tue, 18 Feb 2003 16:19:18 +0100
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"TechNet E-Mail Forum." <[log in to unmask]>, Tegehall Per-Erik <[log in to unmask]>
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Tegehall Per-Erik <[log in to unmask]>
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Hi Werner,

I recently red a paper by P.L. Tu et al. (Effect of Intermetallic Compounds on Vibration Fatigue of µBGA Solder joints, IEEE Trans. on Advanced Pack., Vol. 24, No.2, 2001) which shows cracks in the IMC layers and between IMC and Ni surface. In this study they had glued a 56 g weight on top of the µBGA which might have had a large influence on where the cracks formed. Still, some cracks were indeed formed in the IMC layer. An interesting result was that after aging at 120 degree C for more than 20 days, the crack formation moved from the board side (Ni/solder interface) to the component side (Cu/solder interface) of the solder joints. The cracks formed at the component side were formed either in the CU-IMC/solder interface or between Cu6Sn5 and Cu3Sn IMC layers. The results are interesting and a bit alarming, I think, especially for applications with long service life at high temperatures and high vibration levels, for example under-the-hood applications.

Per-Erik Tegehall
IVF

-----Ursprungligt meddelande-----
Från: Werner Engelmaier [mailto:[log in to unmask]]
Skickat: den 18 februari 2003 15:42
Till: [log in to unmask]
Ämne: Re: [TN]


Hi Peter,
The IMC layer thickness scare comes from the US military from some 40 to 30
years ago when essentially everything electronic was ceramic and they zapped
the SJs with large uncontrolled soldering irons.
>Solder joints on Class 3 boards, however, operating in environments where
temperature >cycling and vibration are normal, do, in my experience, suffer
higher fracture rates in older >age, often either through the IMC layer or on
its border. For that reason, I argue against >applying more heat to a board
than is totally necessary.
***I agree with this statement, except with "through the IMC layer;" Class 3
operating environments are typically more severe and Class 3 more often than
not have larger CTE-mismatches--hermeticity=>ceramic components--and the
layer in the solder adjacent to the IMC layer is Pb-rich because the Sn has
been used to form the IMC. The Pb-rich zone is where failure frequently
occurs--it is not clear whether this is because of higher loading near the
interface [SJ geometry & local expansion mismatch] or because of a
metallurgical weakness.
Should anyone have any pictures of SJ fractures in the IMC layer(s), I should
appreciate a copy. All the pictures that I have seen that have been termed as
IMC failures were in fact in the Pb-rich zone.
All IMCs are brittle, but, except for AgSn and AuSn IMCs, they are also much
stronger than the solder. Thus, they--the IMCs--do not fail. The Pb-rich zone
created by the formation of the IMCs is somewhat implicated, but there is no
evidence I am aware of that suggests a thicker Pb-rich zone  results in
earlier failure. This may sound like a purely academic difference, but only a
proper understanding without misconceptions helps in making your best
product--the  danger here is that people run reflow profiles that do not
allow adequate wetting of SJs, a proven problem.
There are a lot of anecdotal stories floating around, but pretty little that
is factually proven.
Having said all this, I fully endorse your statement: "I argue against
applying more heat to a board than is totally necessary."

Werner Engelmaier

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