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February 2003

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Tue, 11 Feb 2003 16:10:50 -0500
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"TechNet E-Mail Forum." <[log in to unmask]>, Tom Gervascio <[log in to unmask]>
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Have seen problems with hole fill due to cracked plated through holes

>>> [log in to unmask] 01/13/03 07:05PM >>>

Marie,

Welcome to TechNet!

Although no expert, my reaction is that voids in the goldplating would
not,
in itself, cause poor vertical fill in the holes. The gold should burn
off
during soldering and wetting should be to the underlying Nickel
(presumably
this is an ENIG board). It seems to me that the problem is either with
the
underlying copper plating or else the Nickel layer plated onto that.
Have
you done any cross-sections of affected areas?

Some questions:

1. What are the diameters and aspect ratios of the affected holes? If
the
aspect ratio is too great and/or the hole diameter too small, plating
thickness half way down the hole is affected, especially with
small-diameter holes.
2. What is the target gold plating thickness? If it's too thick, that
may
have some bearing on the problem you're seeing. If it's too thin, and
you
have Nickel plating underneath, you may have porous gold that has
allowed
the Nickel to oxidise. This would cause poor wetting and so the solder
might not rise properly.
3. What flux was used to assemble the boards? Maybe you need to try a
slightly more aggressive one. I'm not well up on fluxes, so can't make
any
recommendations, but I'm sure others can.
4. Is it only the holes that are affected, or is the soldering quality
of
other parts of the boards less than ideal also?

We need a few more clues to give a better answer.

Peter



Marie Magnin <[log in to unmask]> 13/01/2003 10:01 PM
Sent by: TechNet <[log in to unmask]>

Please respond to "TechNet E-Mail Forum."; Please respond to Marie
Magnin


              To:  [log in to unmask]

              cc:  (bcc: DUNCAN Peter/Asst Prin Engr/ST Aero/ST Group)

              Subject: [TN] voids in gold plated holes












Dear TECHNETers,

It is my first post to this list, please forgive me if I ask an
already
posted question, but I could not find any answer to my problem.

We have received, populated and soldered a set of 50 boards which have
voids in the gold plating layer into holes (either PTH and via holes).
We
have discovered the problem because of a poor vertical fill of the
holes at
wave soldering.

Is there any standard for this parameter ? Neither IPC nor PERFAG
mention
anything about this, they just state on copper plating.

Is there any risk of corrosion in the future for these boards ? (they
will
be installed in factories, means in "standard" environnement in terms
of
humidity and temperature )
If yes, how would you prevent it ? ( we cannot post solder the holes,
because of the large quantity of these and also because many of them
are
hidden under SMD part; I would personnaly would use conformal coating)

Many thanks for your help and kind regards

Marie Magnin
QA Manager
FIRSTEC SA
Rue du Grand Pr  70
CH 1211 Gen ve 2
T l : +41(0)22 918 36 85
Fax : +41(0)22 918 36 93
mailto:[log in to unmask]
http://www.firstec.ch

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