Hi Howard,
I have never seen: Spec Number TSC7514g, section 5.4, reference specification
TSC 7010g, or anything like it, and I have been involved in SMT reliability
for almost 25 years.
>The first question is: is this customer using their own test or is there an
>IPC test for thermal cycling of a completely assembled circuit board?
ANSWER: The test (Ts, dwell times) is reasonable, except for its use of
thermal shock--T-shock will give you totally misleading results, because the
high T-gradients cause component and PWB warpage, and thus create tensile
loads not seen in product. Further, a different damage mechanism in the
solder [see Günter's response] occurs due to the much higher stress levels
occurring with T-shock. For test guidelines and a standard go to IPC-SM-785
and IPC-9701.
>The second question is: is the customer's temperature range too extreme,
>which is causing severe thermal shock, which is then causing joint failures
>due to different co-efficients of expansion and contraction (board, solder,
>lead)?
ANSWER: For T-cycling, the Ts are not extreme. For T-shock the differences in
CTEs are not as much of a factor as are the T-gradients.
>The third question is: is the use of 3,500 hours of thermal cycling realistic
>and/or too long?
ANSWER: For T-cycling no--all bets are off for T-shock.
Werner Engelmaier
Engelmaier Associates, L.C.
Electronic Packaging, Interconnection and Reliability Consulting
7 Jasmine Run
Ormond Beach, FL 32174 USA
Phone: 904-437-8747, Fax: 904-437-8737
E-mail: [log in to unmask], Website: www.engelmaier.com
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