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January 2003

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Subject:
From:
Marie Magnin <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Mon, 13 Jan 2003 08:01:22 -0600
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Dear TECHNETers,

It is my first post to this list, please forgive me if I ask an already
posted question, but I could not find any answer to my problem.

We have received, populated and soldered a set of 50 boards which have
voids in the gold plating layer into holes (either PTH and via holes). We
have discovered the problem because of a poor vertical fill of the holes at
wave soldering.

Is there any standard for this parameter ? Neither IPC nor PERFAG mention
anything about this, they just state on copper plating.

Is there any risk of corrosion in the future for these boards ? (they will
be installed in factories, means in "standard" environnement in terms of
humidity and temperature )
If yes, how would you prevent it ? ( we cannot post solder the holes,
because of the large quantity of these and also because many of them are
hidden under SMD part; I would personnaly would use conformal coating)

Many thanks for your help and kind regards

Marie Magnin
QA Manager
FIRSTEC SA
Rue du Grand Pré 70
CH 1211 Genève 2
Tél : +41(0)22 918 36 85
Fax : +41(0)22 918 36 93
mailto:[log in to unmask]
http://www.firstec.ch

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