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October 2002

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Subject:
From:
Leon Heller <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Thu, 31 Oct 2002 22:06:34 +0000
Content-Type:
text/plain
Parts/Attachments:
text/plain (49 lines)
>From: John Parsons <[log in to unmask]>
>Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,              John
>Parsons <[log in to unmask]>
>To: [log in to unmask]
>Subject: [TN] FAB - Controlled Capacitance
>Date: Thu, 31 Oct 2002 11:39:38 -0800
>
>This is a first for us.  Our customer has specified
>
>"Capacitance between layers 4 and 5, and layers 6 and 7, shall be greater
>than 250pf per square inch, assuming unperforated planes".
>
>Layers 4 5 6 and 7 are all plane layers (ground/voltage pairs each).
>
>Now, I understand the concept of capacitance but I have not come across,
>nor
>can I seem to source any info telling me how to ensure that we are
>manufacturing to this specification.  I have the IPC-2141 which makes
>reference to controlled capacitance lines (not planes) but does not seem to
>provide any useful info from a manufacturing perspective.

From the distance between the planes, and the dielectric constant of the PCB
material, you can calculate the capacitance using the appropriate formula,
which I've forgotten. 8-(


Leon
--
Leon Heller, G1HSM Tel: +44 1424 14790
Email:[log in to unmask]
My web page: http://www.geocities.com/leon_heller



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