After assembly may be more critical. Many assembled boards have to mate
into a connector and if the board is warped then you may have a more
critical problem......
Franklin D Asbell
<fasbell@NETWORKCI To: [log in to unmask]
RCUITS.COM> cc:
Sent by: TechNet Subject: Re: [TN] WARPAGE
<[log in to unmask]>
10/28/02 11:30 AM
Please respond to
"TechNet E-Mail
Forum."; Please
respond to
Franklin D Asbell
Would that criteria also apply to "populated" boards? I believe he was
seeking data for populated boards...curious...would it matter after
assembly if they were warped or not???
Franklin
----- Original Message -----
From: Eric Castonguay
To: [log in to unmask]
Sent: Monday, October 28, 2002 10:14 AM
Subject: Re: [TN] WARPAGE
Pankaj,
check in IPC-6012 par. 3.4.4 Bow & Twist. The printed board shall have a
maximum bow & twist of 0.75% for boards that use SM components and 1.5%
for all other boards. Also, see test method 2.4.22 described in the
"IPC-TM-650 test methods manual" on how to measure it.
Eric Castonguay, Eng.
Manufacturing Engineering
www.Hyperchip.com
Montreal, Canada
T. 514 906 2409
F. 514 906 2501
-----Original Message-----
From: Karnwal, Pankaj [mailto:[log in to unmask]]
Sent: Monday, October 28, 2002 02:02
To: [log in to unmask]
Subject: [TN] WARPAGE
> Hi TechNet
>
> Can any body give me the acceptable range of PCB {Populated } For
> Warpage, { Both Throughole And SMD And MIX components} .And how we can
> measure it. Also tell that what IPC states about this.
>
>
> With regards
> Pankaj Karnwal
> Quality Assurance Ext. 211
> BESL A-4,Sec-5 NOIDA , 201301, INDIA
> e mail : <mailto:[log in to unmask]>
> Barco, innovators in image processing
>
>
>
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