No direct experience of such close spacing between trace and via, but the
idea of small copper to copper distances causing voids in a glass material
sounds like eyewash to me - especially as you won't be soldering to either
that portion of the trace or to the via (unless you are attaching a wire
link mod to that point.
My immediate reaction, though, and depending on what the via and/or the
trace is carrying in terms of power, is the capacitance effect of the via
on whatever is going along the trace.
Electro-migration, I cannot comment on, but there may be a point there.
Consult the PCB gurus.
Peter
Rob Eason <[log in to unmask]> 19/09/2002 01:20 AM
Sent by: TechNet <[log in to unmask]>
Please respond to "TechNet E-Mail Forum."; Please respond to Rob Eason
To: [log in to unmask]
cc: (bcc: DUNCAN Peter/Asst Prin Engr/ST Aero/ST Group)
Subject: [TN] Close pitch PCB failure
To all,
I thought I would throw this subject out to see if any of you have had
direct experience with this issue. One of our PCB suppliers is concerned
with doing a job for us that has a trace to plated via distance of less
than
.007", stating that there is an inherent probability that under duress of
soldering or when used in a Burn-In chamber for periods of time, that the
glass material would get voids, and that there is a chance of electro
migration causing inner layer shorts. There is a lot of talk about CAF, and
they are throwing around studies by Dupont and Matsushita. They are pushing
us to go with a non-glass material, such as Thermount, but due to the
longer
lead time, we cannot afford the delay.
Is there really an issue here, or are we being duped into believing
something.
Thanks in advance for all of your help.
Regards,
Rob Eason
Cody Electronics, Inc.
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