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August 2002

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Mon, 12 Aug 2002 18:08:38 +0800
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Thanks, Brian <sigh>. I figured that was the way it would be. So many of
the processes that I'm actually meeting face to face for the first time are
in the category of "much-talked-about artforms that have yet to become a
science". As you suggest, I'll have to increase the investment in my
library and find some more reading time.

I join everyone else on TechNet in welcoming you back, hopefully fully
recovered (or at least well on the mend).

Peter



b_ellis <[log in to unmask]>    12/08/2002 05:50 PM

              To:  "TechNet E-Mail Forum." <[log in to unmask]>, DUNCAN Peter/Asst Prin Engr/ST
              Aero/ST Group@ST Domain
              cc:
              Subject: Re: [TN] Board cleanliness








Peter

The problem is as Doug points out. There is NO figure NOR any one method
of determining it that is really meaningful without a good measure of a
very rare commodity: common sense. My advice is to forget all the
contradictory specs and even all the various methods for the time being.
Much more effective is to sit down and read all the books on the subject
of cleaning and contamination control that you can lay your hands on
(there must be at least ten of them) to give yourself an understanding
of what it is all about. As these are often contradictory, as well, you
will have to work out for yourself what is applicable to your conditions
and what isn't.

Just as an example. Take a PCB soldered with an aggressive flux,
uncleaned, and coat it with a thick epoxy coating. If properly cured, it
will pass nearly every test you can give it, but it won't be reliable in
service. Because you haven't approached the problem with common sense.

Brian

[log in to unmask] wrote:
>
> Graham, Doug and other wise persons on this topic,
>
> In the absence of an absolute cleanliness figure for boards, for all the
> goods reasons given, is there then a reliable procedure / formula /
> guideline or even recommendation that could tell me how to determine what
> the cleanliness level for our boards should be? i.e. instead of giving us
> the fish (or not), can you teach us how to fish so that we can catch our
> own?
>
> If we can at least calculate what the cleanliness figure SHOULD be for,
> say, our multilayer class 3 I/O board, made of FR4, finished with HASL,
> ENIG, ImAg, Immersion Tin, etc, with an LPI solder mask, assembled with
> water soluble fluxes, coated with an acrylic, used in a tropical climate
of
> high humidity and high ground temperature, or over the North Pole for up
to
> 15 years, with a known vibration profile for the 'plane it's being used
in,
> etc., etc., - if we can calculate a cleanliness figure for that, then we
> know what we have to test for.
>
> The only questions then are "what are the best cleaning machines and
> methods to achieve that figure?", and "what are the best equipment and
> procedures for measuring that the figure has been achieved?".
>
> Is the SEC test all-embracing - i.e. is it actually a fair measure of how
> clean a board is of all 'hazzardous' contaminants, or are there other
> contaminant types that the SEC test won't recognise but still cause
> problems with boards in the field? Should we be conducting a series of
> cleanliness tests in order to cover all bases? In other words, should
> different cleanliness tests be used depending on the chemistries that
went
> into the boards' manufacture.
>
> Is bare board cleanliness different from assembly cleanliness, should it
be
> and, if so, why?
>
> Peter
> (Assistant pot stirrer)
>
> [log in to unmask]   09/08/2002 11:08 PM
> Sent by: TechNet <[log in to unmask]>
>
> Please respond to "TechNet E-Mail Forum."; Please respond to dopauls
>
>               To:  [log in to unmask]
>               cc:  (bcc: DUNCAN Peter/Asst Prin Engr/ST Aero/ST Group)
>               Subject: Re: [TN] Board cleanliness
>
> Graham,
> May I respectfully suggest you switch to the decaffeinated tea!
>
> You  bring up some good points, but Susan did not write the MIL-P-55110,
> nor did Bev write the Bellcore document.  They, like most industry
> standards have been with us a long time, and have evolved over time.
They
> retain the old values until someone gives them a better test and a better
> value to put in its place.  The same can be said of IPC specs, and I
> suspect, ISO specs as well.
>
> Take a look at J-STD-001, Rev C.  What does it have as a default assembly
> cleanliness level?  1.56 ug/cm2.  Same as 1980 mil specs.  The most
forward
> looking part of the cleanliness requirement is that it takes the stance
> that cleanliness is whatever you define with your customer.  The 1.56
value
> only comes into play if neither you nor your customer have a clue as to
> what it SHOULD be.
>
> Why does this modern spec have values we know to be antiquated?  Because
> the people on the committee (and I am one of them) knew that a one size
> fits all cleanliness requirement for assemblies was ludicrous.  Think
about
> it.  Would you have the same required cleanliness for a garage door
opener
> as you would for a pacemaker or a flight controller?  The same argument
> applies to bare board cleanliness.
>
> IPC-60XX series for bare boards are pretty good documents, but they use
the
> old mil spec levels until someone else gives them something better to put
> in its place.  You will have different board cleanliness requirements for
> class 1, 2, 3 boards, different for high speed, RF, high voltage, high
> power, etc.  The best that I think you can hope for is a set of
recommended
> guidelines as starting points if you have no current information (which
you
> can find now in J-HDBK-001, section 8), and a standard protocol for
> determining how clean YOUR boards need to be for YOUR application for
YOUR
> end use environment.
>
> I have talked with many companies about their bare board cleanliness
> requirements.  Some use the 1.0 ug/cm2 figure in Bellcore.  Some use
values
> of 0.5 ug/cm2 because "they want to be twice as clean as Bellcore" (you
> cannot imagine the stunned silence on my end when I first heard that).
> Other use values like 0.02 as Graham mentions.  Ask them why they have
such
> a value and you will usually get a puzzled expression and an "I dunno".
> Some companies, like Delco Electronics, have put a great deal of time and
> energy into determining how clean their boards have to be with good
science
> behind the decision.
>
> If you are waiting for a single value that you can put in your board
> purchase specs - AIN'T GONNA HAPPEN.
>
> Doug Pauls
> Rockwell Collins
> (Who, in all fairness, should seriously consider decaffeinated Mt. Dew)
>
> Graham Naisbitt <[log in to unmask]>@ipc.org> on 08/09/2002
> 09:19:50 AM
>
> Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please
respond
>        to Graham Naisbitt <[log in to unmask]>
>
> Sent by:    TechNet <[log in to unmask]>
>
> To:    [log in to unmask]
> cc:
>
> Subject:    Re: [TN] Board cleanliness
>
> Hi Bev and Susan,
>
> Permit me a  W O A H!
>
> This is such a misleading spec. To say that something should be cleaned
> to a level of less than 1.5 microgrammes / cm2 also means that it is
> acceptable to leave UP TO 1.5 microgrammes of NaCl equivalence on every
> square cm of your assembly! But if you are manufacturing to modern
> fine-line, fine-pitch and components to suite....then that level will
> almost certainly be too high.
>
> I have many customers who have, as a result, imposed their own empirical
> cleanliness value at something less than 0.02microgrammes/cm2 for Class
> 3 assemblies. As has been stated already, the ionic extract cleanliness
> test is/was only intended to be used for process monitoring. The
> Pass/Fail can and has got a lot of people into troublesome problems.
>
> I also register concern at the use of "hot" ipa / water mixture - safety
> issues apart, there has been a good deal of research demonstrating that
> prolonged immersion in such a solution can induce the bromine flame
> retarder to rise to the surface of the board and....this is a problem!
> Would you care to comment?
>
> Regards Graham Naisbitt
>
> [log in to unmask] <mailto:[log in to unmask]>
>
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>
> > -----Original Message-----
> > From: TechNet [mailto:[log in to unmask]] On Behalf Of Bev Christian
> > Sent: Friday, August 09, 2002 03:44
> > To: [log in to unmask]
> > Subject: Re: [TN] Board cleanliness
> >
> >
> > Patrick,
> > Susan mentions a standard (US military MIL-P-55110E), but I
> > would like to point out another standard - GR-78 CORE from
> > Telcordia, which is used extensively in the
> > telecommunications industry.  It requires that the finished
> > bare board cleanliness be less than (or equal to?) 1
> > ug/square centimeter.  For you Americans, that's 6.5
> > ug/square inch.  The standard goes on to state that for a
> > finished assembly that has gone through a wash cycle that the
> > circuit pack have a SEC value less than (or equal to?) 1.5
> > ug/square centimeter.  There is no standard for no-clean
> > boards, but then there are other criteria that the no-clean
> > flux/solder paste must meet first
> > - copper mirror, halide ion spot test, SIR and
> > electromigration. Some companies still require a fluoride ion
> > spot test and SIR/EM testing of possible mixtures of wave
> > soldering fluxes/solder pastes/cored wires. And some
> > companies have set process indicator levels for SEC testing
> > of circuit packs manufactured with no-clean fluxes,
> > especially for wave soldering. Note, I said "process
> > indicator", so don't bring fire and brimstone down on me,
> > fellow Technetters!  :)
> >
> > regards,
> > Bev Christian
> > Research in Motion
> >
> > -----Original Message-----
> > From: [log in to unmask] [mailto:[log in to unmask]]
> > Sent: August 8, 2002 4:41 PM
> > To: [log in to unmask]
> > Subject: [TN] Board cleanliness
> >
> >
> > Hi Technetters,
> >
> > I would like to know how to specify board cleanliness on the
> > Fab drawing. We use class 3  boards. Does it make any
> > difference on cleanliness standard? Is it OK to ask for
> > cleanliness test results/reports shipped with every lot?
> > Which department in a company should be responsible for this
> > board cleanliness issue, R&D, Quality or Production?
> >
> > Thanks in advance to everyone sharing this information.
> >
> > Best regards,
> >
> > Patrick
> > ----------------------------------------------------------
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