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August 2002

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Subject:
From:
Graham Naisbitt <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Fri, 9 Aug 2002 15:19:50 +0100
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Hi Bev and Susan,

Permit me a  W O A H!

This is such a misleading spec. To say that something should be cleaned
to a level of less than 1.5 microgrammes / cm2 also means that it is
acceptable to leave UP TO 1.5 microgrammes of NaCl equivalence on every
square cm of your assembly! But if you are manufacturing to modern
fine-line, fine-pitch and components to suite....then that level will
almost certainly be too high.

I have many customers who have, as a result, imposed their own empirical
cleanliness value at something less than 0.02microgrammes/cm2 for Class
3 assemblies. As has been stated already, the ionic extract cleanliness
test is/was only intended to be used for process monitoring. The
Pass/Fail can and has got a lot of people into troublesome problems.

I also register concern at the use of "hot" ipa / water mixture - safety
issues apart, there has been a good deal of research demonstrating that
prolonged immersion in such a solution can induce the bromine flame
retarder to rise to the surface of the board and....this is a problem!
Would you care to comment?

Regards Graham Naisbitt

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> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]] On Behalf Of Bev Christian
> Sent: Friday, August 09, 2002 03:44
> To: [log in to unmask]
> Subject: Re: [TN] Board cleanliness
>
>
> Patrick,
> Susan mentions a standard (US military MIL-P-55110E), but I
> would like to point out another standard - GR-78 CORE from
> Telcordia, which is used extensively in the
> telecommunications industry.  It requires that the finished
> bare board cleanliness be less than (or equal to?) 1
> ug/square centimeter.  For you Americans, that's 6.5
> ug/square inch.  The standard goes on to state that for a
> finished assembly that has gone through a wash cycle that the
> circuit pack have a SEC value less than (or equal to?) 1.5
> ug/square centimeter.  There is no standard for no-clean
> boards, but then there are other criteria that the no-clean
> flux/solder paste must meet first
> - copper mirror, halide ion spot test, SIR and
> electromigration. Some companies still require a fluoride ion
> spot test and SIR/EM testing of possible mixtures of wave
> soldering fluxes/solder pastes/cored wires. And some
> companies have set process indicator levels for SEC testing
> of circuit packs manufactured with no-clean fluxes,
> especially for wave soldering. Note, I said "process
> indicator", so don't bring fire and brimstone down on me,
> fellow Technetters!  :)
>
> regards,
> Bev Christian
> Research in Motion
>
> -----Original Message-----
> From: [log in to unmask] [mailto:[log in to unmask]]
> Sent: August 8, 2002 4:41 PM
> To: [log in to unmask]
> Subject: [TN] Board cleanliness
>
>
> Hi Technetters,
>
> I would like to know how to specify board cleanliness on the
> Fab drawing. We use class 3  boards. Does it make any
> difference on cleanliness standard? Is it OK to ask for
> cleanliness test results/reports shipped with every lot?
> Which department in a company should be responsible for this
> board cleanliness issue, R&D, Quality or Production?
>
> Thanks in advance to everyone sharing this information.
>
> Best regards,
>
> Patrick
> ----------------------------------------------------------
> This e-mail may contain SEL confidential information.  The
> opinions expressed are not necessarily those of SEL.  Any
> unauthorized disclosure, distribution or other use is
> prohibited.  If you received this e-mail in error, please
> notify the sender, permanently delete it, and destroy any
> printout.  Thank you.
>
> --------------------------------------------------------------
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