Patrick,
Susan mentions a standard (US military MIL-P-55110E), but I would like to
point out another standard - GR-78 CORE from Telcordia, which is used
extensively in the telecommunications industry. It requires that the
finished bare board cleanliness be less than (or equal to?) 1 ug/square
centimeter. For you Americans, that's 6.5 ug/square inch. The standard
goes on to state that for a finished assembly that has gone through a wash
cycle that the circuit pack have a SEC value less than (or equal to?) 1.5
ug/square centimeter. There is no standard for no-clean boards, but then
there are other criteria that the no-clean flux/solder paste must meet first
- copper mirror, halide ion spot test, SIR and electromigration. Some
companies still require a fluoride ion spot test and SIR/EM testing of
possible mixtures of wave soldering fluxes/solder pastes/cored wires. And
some companies have set process indicator levels for SEC testing of circuit
packs manufactured with no-clean fluxes, especially for wave soldering.
Note, I said "process indicator", so don't bring fire and brimstone down on
me, fellow Technetters! :)
regards,
Bev Christian
Research in Motion
-----Original Message-----
From: [log in to unmask] [mailto:[log in to unmask]]
Sent: August 8, 2002 4:41 PM
To: [log in to unmask]
Subject: [TN] Board cleanliness
Hi Technetters,
I would like to know how to specify board cleanliness on the Fab drawing. We
use
class 3 boards. Does it make any difference on cleanliness standard? Is it
OK
to ask for cleanliness test results/reports shipped with every lot? Which
department in a company should be responsible for this board cleanliness
issue,
R&D, Quality or Production?
Thanks in advance to everyone sharing this information.
Best regards,
Patrick
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