This whole test thing has evolved to a point where we cheat more anf more
often as Peter says. We probe, poke, dig, and otherwise make a mess of what
we're trying to defend as good solder joints.

One of our boards, though not that densely populated by some standards, has
1900 test pads on the board's bottom side. Most are not on an IPC "approved"
grid. For that reason, many cannot be tested at all even with a funnel plate.

Another of our boards, not at all unique, physical test points on the bottom
side adhereing to IPC grid and size requirements. However, half the physical
test points have been eliminated because much of the circuit has components
capable of being tested using boundary scan.

The devices allowing boundary scan have built in circuitry, or registers for
lack of a better term, providing a network, or bus, that can almost self test
with proper programming using only a four pin header thus eliminating the need
for many traditional test points.

Boundary scan provides many opportunities not only to minimize test points, but
to design a concurrent test strategy that functions very well to determine
fault or defect not capable of being done any other way. Combinint this with
effective and effective process management at the board design, fabrication,
and assembly levels, a high degree of defect determination can be assured
notwithstanding the ability to eliminate the barbaric act of stabbing to
death otherwise good solder joints.

Earl

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