Eddie,
Hi! thank you for your thoughts and comments. I would like you to
consider that "impedance" only tells me something about the
intersection of line widths and their distance from an adjacent
plane. "Impedance" won't tell me how close or far apart the signal
layers are, or how close or far apart the gnd/vcc planes are -
and both of those proximities effect some electrical performance
numbers.
I believe one can have their impedance and geometries too! Thank you
to Michael McMaster for understanding the customer needs. The key
as he an Earl and others stated is to work with the supplier on
the actual construction - giving the supplier all the "wants to
haves" and "needs to haves" and then, only the OEM gets to sit in
on the construction discussion and know what will be going into the
press. And then require a first article that includes a statictical
analysis of the deviation of the impedances; includes actual cross
sectional measurements of the line widths and the dielectric spacings.
Then we know: can it be made repeatedly or is it too close to an
upper or lower limit on some requirement? Depending on the answer,
we go back and fine tune it and run it again. Once we (the designer
and the supplier) both know it can be built and it is the best
compromise of all the "wants and needs" we both agree to it, nail it
down - and - no changes. That is the way it will be.
And I do that for every supplier of every part.
For low tech boards it's a slam dunk; for medium tech there may be
some puts and takes, but usually there is lattitude. What we are really
talking about is the high speed digital boards, say 1 GHz or better,
where to have them work AND work without a lot of variance board
to board, specifying impedance isn't prescriptive enough. And actually
"impedance" is only used, as I said in the beginning, to give me
some information on some of the elements. Since the other elements
have to be confirmed by cross-section anyway, I actually could go
without readings after the design is debugged and frozen.
Where it would get hairy would be where the combinations of mechanical
and electrical requirements leave the fabricator with a part specified
tighter than the process can deliver (less than 2.0 cpk) - but since we
are a player in the construction discussion then we (hopefully)
recognize that. Then the coupons are necessary to sort parts - I don't
like it but it's true ... let's say we want +/-5% impedance - then most
likely we are buying into a sort process and paying for the outliers.
The other value, in the above case, is as a process control tool to
measure the results of any process changes, hopefully to narrow
variance or improve ability to hit nominal.
So there is a place and a reason to use impedance and impedance coupons,
and a place and a reason to work with all the mechanical inputs; it's
iterative, but it's on paper until we get something that looks good,
then we buy engineering protos; get FAI data; build, test, fine tune
and do it again ..
(ps: I don't actually specify the resin content or the prepreg; at
least not usually. The Corp. Acceptability guidelines address some
of those issues like minimum thickness between power planes; number
sheets of prepreg etc. At least for where we are today, it is good
enough to agree on the separation and tolerance; but who knows about
tomorrow. There are only so many glass styles; so many prepreg
combos to choose from in thin separations; and % resin and specific
Er are outcomes of the prepreg choices ....)
Regards,
Valerie
------------- Begin Forwarded Message -------------
Content-transfer-encoding: 7BIT
Date: Thu, 11 Jul 2002 11:56:51 -0700
From: Eddie Rocha <[log in to unmask]>
Subject: Re: [TN] Stackup specification, tolerance, power plane resonance?
X-To: gacrowell <[log in to unmask]>
To: [log in to unmask]
You need to decide what you want, a controlled impedance PCB or
a PCB with controlled dielectrics and trace widths? It should be
one or the other. No fabricator wants their hands tied to meet an
impedance requirement. The fabricator can meet either an
impedance requirement or contolled dielectrics & trace widths.
With the latter, you'll want to specify the specific prepregs, and
cores ( with the prepregs used to build that core) in order for the
PCB to perform electrically the same from fabricator to fabricator.
In addition, you'll nee to specify the resin content of each prepreg
being used. As you can see, it can become very hairy to specify
the controlled dielectrics. Not to mention that, not all fabricators
inventory the same cores and prepregs. Cost is not particularly a
concern when specifying the stack-up, but delivery time can be
from fabricator to fabricator.
How was the impedance verified on the new boards? Are you sure
the impedances are met? A written report isn't always as accurate
as actual TDR measurements. (Can you read between the lines?)
Good luck,
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