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May 2002

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Subject:
From:
Seth Goodman <[log in to unmask]>
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Date:
Mon, 20 May 2002 17:43:02 -0500
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Hi Marc,

The capacitance is only related to the surface areas of the two conductors
of the capacitor, the geometry separating them and the dielectric constant
of the material in between.  Unless your board has lots of layers, most
people worry more about the via inductance than the capacitance.  Going
smaller will increase the inductance.  If it's a partial via and it's not
too long, there's not much to worry about.  This can be calculated pretty
easily.  One can also worry about the impedance discontinuity from the trace
to the via causing reflections.  Fortunately, since the via actually ends in
the pad, the slight discontinuity and resulting reflection from the trace to
the via will be dwarfed by the discontinuity and reflection from the pad to
the device, which has an impedance mismatch that is orders of magnitude
worse, unless the device itself has carefully controlled impedance or the
signal continues through a passive device.  Remember also that the
electrical length of the via is miniscule, so the two reflections will be
pretty much on top of each other.  It's easy to miss the forest for the
trees.

Calculating the capacitance from a via to the (plane?) layers that it
penetrates is not as easy.  However, if it was really essential, and I have
a hard time believing it is, you could maintain the same capacitance you had
with the previous via by selecting the via clearance properly.

Sorry if I seem cavalier about this.  A via ending in a pad for an active
device generally makes the via a don't care in terms of electrical
properties.  On the other hand, if the pad was for a balun, circulator or
other matching device and the signal continued on, then there is at least
some reason to worry about this.

Regards,

Seth Goodman
Goodman Associates, LLC
tel 608.833.9933
fax 608.833.9966


> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]]On Behalf Of
> [log in to unmask]
> Sent: Monday, May 20, 2002 4:58 AM
> To: [log in to unmask]
> Subject: [TN] Via Capacitance
>
>
> Hi All,
>
> With regards to how a vias capacitance varies with the finished hole size,
> is there a formula to calculate this? We intend to reduce the via
> dimensions
> from 10 mils to 8 mils on a via-in-pad via. The concern is that in RF
> circuits this has been used for a reason and we are getting kick
> back due to
> the concern that the capacitance of the via is being modified.
>
> Thanks for your help.
>
> Best regards
>
> Marc Cowen

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