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April 2002

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Subject:
From:
"Mcmaster, Michael" <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Tue, 30 Apr 2002 15:21:58 -0700
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text/plain (111 lines)
Peter

That's exactly what I was getting at.  Most of our applications for CB-100
are for filled vias that need to be plated over to provide a solderable
surface and/or prevent solder from running out the bottom end of the via.

> ----------
> From:         [log in to unmask][SMTP:[log in to unmask]]
> Reply To:     TechNet E-Mail Forum.;[log in to unmask]
> Sent:         Monday, April 29, 2002 5:40 PM
> To:   [log in to unmask]
> Subject:      Re: [TN] Via Plug
>
> I just did a calculation for some of our boards that use this via plug
> material for enhancing thermal transfer between chips and thermal planes.
> The calculation was to see by how much I would have to increase hole
> plating thickness by in order to completely replace the epoxy in terms of
> thermal conductivity.
>
> I'm talking about a 24 mils diameter hole, plated initially to 1/2 oz
> copper minimum and filled with epoxy. The board is 63 mils thick. Can you
> guess what the increase is? ..... It's actually only 0.2 oz or 0.28 mils,
> according to our thermal engineer. So why go to all the trouble and
> expense
> of filling holes if the only purpose is thermal - a fairly small increase
> in plating thickness is all that's needed.
>
> Peter
>
>
>
> Earl Moon <[log in to unmask]> 30/04/2002 05:49 AM
> Sent by: TechNet <[log in to unmask]>
>
> Please respond to "TechNet E-Mail Forum."; Please respond to Earl Moon
>
>              To: [log in to unmask]
>              cc: (bcc: DUNCAN Peter/Asst Prin Engr/ST Aero/ST Group)
>              Subject: Re: [TN] Via Plug
>
>
>
>
>
>
>
>
> Don't mean to but in, but what the hell. Just think how much surface
> copper
> would be plated and how much resist would have to be applied and how much
> plating overhang would be involved even with several resist layers
> applied,
> etc..
>
> MoonMan
>
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