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March 2002

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Date:
Wed, 6 Mar 2002 17:47:52 +0800
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Dear T-Nagers (PCB Design and Fab variety),

I am experiencing considerable difficulty in getting a number of fab houses
to produce our project's PCB's "right first time". Confident two week
turn-around quotes result in 4 and 6 week deliveries as they find they have
to re-fab two, three and even four times. Maybe we're using rubbish fab
shops, but they are certified MIL or IPC houses.

The only feedback on general points that I've had, and that's common to
them all, concerns our pad:hole ratio vs. 4 mils annular ring requirement.

Here's what we're asking them to produce at the moment:

-9" x 6" approx VME std boards (0.63 +/- 0.008" thk) class 3 for military
avionics.
-10 and 12 layers
-All layers are 1 oz copper except for layer 2, two middle layers and the
second last layer, which are 2 oz for planes.
-Material is FR4  IPC-4101/26
-Pad diameter (generally) = finished hole diameter + 12 mils
-Trace width = 10 mils signal, 15 mils power, spaces = 8 mils, reduced
locally to 8 mils where they have to pass through confined spaces such as
between fine-pitch connector pins.
-Via holes = 18 mils, via hole pads = 30 mils
-Outside layers start as 1/2 oz and are plated to minimum 1 oz
-Solder mask is 4 mils thick LPI (probably too thick, but I've no idea what
to specify)
-Finish plating is either HASL or ENIG
-Patterns of thermal via holes are filled with silver-loaded epoxy.
-Nothing particularly fancy otherwise on most of the boards, although one
type did have 3 blind via groups on each side as well as the through-hole
group.

Our designers do not include any allowance for manufacturing tolerences in
their selection of hole:pad ratio (I am arguing strongly for them to
include something, hence my proposal below). Pad diameter minus annular
ring requirement minus thickness of copper and finish plating equals zero.
I have proposed to our technical team a reduction in via hole diameter from
18 mils (aspect ratio 1:4) to 14 mils (aspect ratio 1:5), as a means of
giving the fab houses some manoeuvering room, but have received a reply
including the following arguments against it:

1) 1:5 aspect ratio is too great for long term reliability. Expansion
causes hole copper plating to segment under thermal cycling and break
contact with layers. IS THIS TRUE? Any evidence or can a voice of
experience out there answer this one?
2) Reducing trace widths further results in "weak traces and very weak
connection between traces and pads." HOW THIN CAN TRACES RELIABLY GET THESE
DAYS ON  MILITARY BOARDS?

The boards are very densely populated, and a general increase in via hole
pad diameter of even 5 mils means losing 9% of our board area, such is the
number of holes. This we cannot afford, hence the proposal to reduce hole
diameter, especially for vias.

I could really use some support regarding what via hole aspect ratios,
plating thicknesses and minimum pad:hole ratios are reliable for military
use given teh baord info above. Our Tech Team are even proposing to remove
non-functional pads to free up real estate in some areas - a move I'm
strongly resisting.

MTIA,

Peter

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