Cheers, Brad! Always nice to have some voluble support, especially on the
'non-functional' pad issue. At the moment, I can't gauge if there's good,
definitive scientific backing for one view or the other (remove pads or
retain). Both sides of the argument are pursuasive for different reasons. I
therefore reckon that removal or retention of pads depends on the
conditions that obtain when having to make that decision, rather than
generally advocating removal or retention.
Z-axis stretch is the big concern, and I do want to amend our fab spec to
ensure that hole plating is 1 mil min rather than 0.7 mils, as it could
read at the moment. That would require a slightly bigger pad allowance than
we have at present, and pad size, as you know, is a contentious issue with
our design team right now. I'll battle on, though.
Peter
B2Saunders@AO
L.COM To: [log in to unmask]
Sent by: cc: (bcc: DUNCAN Peter/Asst Prin Engr/ST
TechNet Aero/ST Group)
<[log in to unmask] Subject: Re: [TN] Pads, holes, traces and
ORG> Class 3 field reliability
03/12/02
02:48 AM
Please
respond to
"TechNet
E-Mail
Forum.";
Please
respond to
B2Saunders
Peter,
Removing inner pads and using the newly found area is certain death. I
have
a fellow FAE that does a seminar on the error of blindly removing pads to
gain trace area. Less than .001 average wall thickness on a conventional
PTH
in a Military PWB is death. Aspect ratio's of 7/1 are much much more
reliable than this pad removal scheme and allowing less than the .001 PTH
wall thickness. The PTH thickness plays with aspect ratio; to the extent
that .0007 will work for MicroVia, but the Z axis is from .002 to .005.
That
is a big difference. Finally in reference to pad deletion your better off
making the entire board tougher to fab with smaller pads than to
arbitrarily
delete and bump traces.
Boston Brad
781 858 0783
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