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February 2002

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Wed, 6 Feb 2002 18:22:57 +0800
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Thermal vias are like any other via, except, perhaps a little larger in
diameter. They are drilled and plated in the same way as all other holes.
They are used to (a) conduct heat from components to a copper plane within
the board and (b) to conduct heat from the internal planes to the outside
world (chassis wall, or whatever). They should be solidly connected (i.e.
no thermal relief feature) to the plane being used to sink the heat (either
a specific Thermal Plane or planes, not electrically connected to anything
else on the board, or to a Ground Plane). Check electrical requirements
(like chassis ground loops) before you automatically choose a ground plane
to act as your thermal plane as well.

We use 25 mil diameter holes on a 0.1 inch grid though copper fill areas in
63 mil thick boards. The thermal vias are (only) connect to two thermal
planes inside the board, as near to the surface as possible. To augment the
conductivity a bit, we also fill the thermal vias with silver epoxy, though
the effectiveness of this has been the subject of some debate. It helps us
anyway.

If used under QFP's, CPLD's, etc with large and tight fan-outs to
through-vias, the effectiveness of thermal vias is limited - not much
thermal path through the fan-out for the heat to dissipate through.

If you use blind vias as thermal vias, there is a limit to the aspect ratio
that can be filled, though I successfully pursuaded a fab house that could
fill a 25 mils diameter hole, 7 mils deep without losing the epoxy or
having a poor finish. Makes everything a bit expensive, though.

From the normal manufacturing point of view, there are no real problems -
they're treated like any other hole. Ditto from the design perspective -
the hole itself needs little or no special consideration beyond how big it
should be and how thick to plate it to conduct your heat at the desired
rate. Relative pad sizes need be no different from normal.

Hope this helps a bit.

Peter




                    Lekhanh Dang
                    <ledang@CISCO        To:     [log in to unmask]
                    .COM>                cc:     (bcc: DUNCAN Peter/Asst Prin Engr/ST
                    Sent by:             Aero/ST Group)
                    TechNet              Subject:     [TN] Thermal vias
                    <[log in to unmask]
                    ORG>


                    02/06/02
                    03:04 PM
                    Please
                    respond to
                    "TechNet
                    E-Mail
                    Forum.";
                    Please
                    respond to
                    Lekhanh Dang






Hi all,

I am looking for information about thermal via, from design criteria to
application, including manufacturing process. What I got is either not
informative enough, or pretty outdated. Any input is very appreciated.

Thanks,

Le-

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