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January 2002

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Subject:
From:
Jorge Rodriguez <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Tue, 22 Jan 2002 11:38:29 -0700
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Paul,

        The need of solder mask when dealing with wave solder and SMT is to
prevent flux entrapment. This can happen when vias are found underneath SMT
devices. The other concern is the heat transfer to the top side under the
same conditions. We are currently facing a problem with a customer that
likes to use 25 mils vias under fine pitch devices. This is causing some
issues at the wave solder operation, the QFPs re-melt again creating solder
opens. The alternative of reducing the temperature at the preheaters doesn't
solve the problem since we face another one, flux doesn't get activated and
we end up with solder balls on the top side, solvents get entrapped on the
vias and explode at the wave like a volcano.

Jorge

-----Original Message-----
From: Paul Truit [mailto:[log in to unmask]]
Sent: Tuesday, January 22, 2002 10:11 AM
To: [log in to unmask]
Subject: [TN] Solder fill of via's and reliability


I am interested in hearing others views in regard to allowing the wave
soldering process to fill the vias with solder or tenting the vias with
soldermask and how this relates to reliability.

I am seeing more and more designs with the vias covered.  Wouldn't
allowing the vias to fill with solder increase the reliability of the
PCA?  Or is this a matter of covering for the "sins" of the bare board
manufacturer's plating process?  Expecting .001" but getting
.0007-.0008" copper plating.

Should via's be left uncovered?

Respectfully

Paul


--
Paul Truit, Mfg. Eng.
RBB Systems, Inc.
4265C E. Lincolnway
Wooster, OH  44691
Ph. (330) 567-2906 ext 514
Fax (330) 263-5324
Email: [log in to unmask]

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