I would still like more feedback/opinion concerning the mechanical function
of these 'non-functional' pads. I am very much of the opinion that they act
as 'wall ties' to better secure the plated barrels to the wall of the
holes, thus reducing the tendency or severity of deformation through
pull-away or resin recession, especially during temperature cycling and
vibration. For PTH components, I know that the extra keying afforded by
these pads reduces the incidence of barrels being ripped out during rework
by ham-fisted operators.
Are the stated fab problems actually of major significance or is a mole
hill becoming a mountain under this magnifying glass of a forum?
Peter
Charles
McMahon To: [log in to unmask]
<cmcmahon@EART cc: (bcc: DUNCAN Peter/Asst Prin Engr/ST
HLINK.NET> Aero/ST Group)
Sent by: Subject: Re: [TN] Remove unused "dead" pads on
TechNet internal layers
<[log in to unmask]
RG>
01/18/02 08:47
AM
Please respond
to "TechNet
E-Mail
Forum.";
Please respond
to Charles
McMahon
Ms. Bergman is correct.
The more features to deal with, the more opportunity for defects.
It only makes sense to eliminate non-functional components within a design.
This requires the end user to consider advising the designer to perform the
function of optimization.
I have found they will not do so except under extreme social pressure.
Was this type of scenario not the precursor to the need for DFM?
Lastly, as a provider of pcb's, I would be less inclined to have the FAB
shop make modifcations of this type to the data as a matter of process.
I would encourage instead that the customer have their designer do these
optimizations to avoid any mis-understandings.
The goal of course is to do it right the first time to increase yields and
lower costs to the customer.
Sincerely,
Charlie McMahon
Kathy Bergman wrote:
I cannot resist this one....
From a board manufacturer's point of view, inner layer and outer
layer pad concerns are completely different.
The process of imaging and etching an inner layer involves: the
photoresist being applied to an undrilled core material, then the
exposing and developing of it. This positive image is then put through
an etcher and this is the inner layer image, without holes. Then the
cores are laminated and the board is drilled. If a board has 4,000
holes, and 50 traces on an inner layer signal layer, I would rather
deal with 50 traces only, than 50 traces and 4,000+ pads. When the
board is completed, a hole with no pads on the innerlayers would be no
different (or have no less integrity) than a hole on a non-multilayer
board. If the processes are under control, there should be no problem
with the holes. The material used in making a double sided board is
manufactured in the same was as a multilayer board is built, with
prepreg and foil (basically).
As far as the outer layers go, small (< .150, say) non plated holes
with pads that are intentional, must be processed differently (an
extra step) than non plated holes without pads. AND, if you have a
large non plated hole with small pad (<.015 per side over hole size),
the pads can randomly pop off, for various reasons.
I think the general opinion of most fab houses is this: Data comes in
from so many different systems, it is hard to know if there were
restrictions on the data output, or if many of the situations are
intentional. If the fab house has a strong front end system all issues
are addressed, and the boards are built to the customer's
requirements. I can say that from a yeild point of view, though, most
all builders of PCB's would rather delete unused pads on inner layers,
and have no pads on outer layer Npth holes.
Regards,
K Bergman
Genny Gibbard wrote:
Fascinating stuff. We had a board vendor at one point that
wanted us to put
pads on all the layers of a PTH. I thought the reason given was
to help the
hole plating process. Our standard block for multilayer boards
automatically puts pads on all layers and if not a ground via, it
also
clears the ground plane away around it on all layers. I've never
heard of
any of the problems mentioned over the last few days.
It's kind of funny, the amount of things I hear about on this
forum that
question things or dispute things that we've never really paid
much
attention to in our own layouts makes me fascinated that this co.
has gotten
as much product out the door working as it has over the last
dozen years. I
guess Murphy's law isn't always on duty.
-----Original Message-----
From: Hinners Hans M Civ WRALC/LUGE [
mailto:[log in to unmask] ]
Sent: January 17, 2002 4:03 PM
To: [log in to unmask]
Subject: Re: [TN] Remove unused "dead" pads on internal layers
Hi All,
Now that I think of it we always stuck our nonfunctional pads in
places we
didn't have to drill. But I'm on the list to learn - thanks to
Warren,
Werner.
Roger, this sounds very weird - granted I've only been in the
industry since
'98. There are very good reasons to use nonfunctional pads. Now
I know not
to use them in PTHs (& Route areas I imagine). I wonder if
people are
making this more difficult than it has to be - we've always used
decent
sized dots so they wouldn't pop off of the core from rough
handling or
processing. We kept them far enough away from traces to avoid
etch problems
- we're not talking about something that has to have a critical
feature
size. They may have been struggling with metallic contamination
but
non-functional pads should be a fixable problem - no?
If they were truly having problems with non-functional pads then
they must
have had the same trouble with the functional pads? Houston . .
. . we've
had a problem.
Hans
Integrity First - Service Before Self - Excellence in All We
Do
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Hans M. Hinners
Electronics Engineer
Warner Robins - Air Logistics Center (WR-ALC/LUGE)
226 Cochran Street
Robins AFB GA 31098-1622
mailto:[log in to unmask]
Com: (478) 926 - 5224
Fax: (478) 926 - 4911
DSN Prefix: 468
-----Original Message-----
From: Roger M. Stoops [mailto:[log in to unmask] ]
Sent: Wednesday, January 16, 2002 2:10 PM
To: [log in to unmask]
Subject: Re: [TN] Remove unused "dead" pads on internal layers
I have been following this thread with interest. When I asked a
pcb vendor
about having non-functional pads in the inner layers, they said
it was not
a good idea, that the unattached pads/lands would move around, or
"float,"
and cause potential mfg problems, such as shorts to other copper.
Question: Is there any truth to this statement, or is this just
an old
husband's tale?
TIA,
Roger M. Stoops, C.I.D., PCB Designer
[log in to unmask]
Trimble
Engineering and Construction Division
5475 Kellenburger Rd.
Dayton, OH 45424-1099 USA
Ph: +01 937.233.8921 or +01 937.233.4574 ext 288
Fax: +01 937.233.7511
"<Peter
George To: [log in to unmask]
Duncan>" cc:
Sent by: Subject: Re: [TN]
Remove unused
"dead" pads on internal layers
TechNet
<[log in to unmask]
ORG>
01/15/02
09:09 PM
Please
respond to
"TechNet
E-Mail
Forum.";
Please
respond to
peter.duncan
Hi,
Actually these "unused" pads are replicates of the hole "rules"
created for
the surface layers. Most routing packages, or routers, seem to do
this by
default for each layer to save manual replication where traces,
etc are to
be connected. (At least PADS, Alegro and Mentor do). On the
grounds that
it's always easier to destroy than to build, it's easier to
delete pad data
than to create it, so it's put in by default as there's a good
chance it
will be needed.
I still say you should consider hole barrel strength/support
issues before
just deleting them - e.g. they can constrain the "resin
recession" and hole
wall pull-away that have been recent threads on this forum. Think
of the
"unused" pads as 'wall ties' holding the copper at frequent
intervals to
the hole wall. Copper bulging or pull-away in the event of
recession or
whatever is reduced.
Peter Duncan
Hinners Hans M Civ
WRALC/LUGE To:
[log in to unmask]
<Hans.Hinners@ROBI cc: (bcc:
DUNCAN
Peter/Asst Prin Engr/ST
NS.AF.MIL> Aero/ST Group)
Sent by: TechNet Subject: Re:
[TN] Remove
unused "dead" pads on
<[log in to unmask]> internal layers
01/15/02 09:40 PM
Please respond to
"TechNet E-Mail
Forum."; Please
respond to Hinners
Hans M Civ
WRALC/LUGE
Hi Patrick,
As others have said, I don't think the class of board matters for
"unused"
pads. It all depends on what your procurement documentation
states, are
you
building to drawing or is there a clause that says process
improvements
that
do not affect functionality are permissible.
"Are they really unused pads?"
They may be electrically nonfunctioning but they are there for a
reason -
better lamination quality (avoiding low pressure areas or
excessive prepreg
flow), better hole wall quality, better plating quality (esp. for
any
isolated traces), reduced loading of your etch solution or better
thermal
loading during assembly.
Hans
Integrity First - Service Before Self - Excellence in All We
Do
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Hans M. Hinners
Electronics Engineer
Warner Robins - Air Logistics Center (WR-ALC/LUGE)
226 Cochran Street
Robins AFB GA 31098-1622
mailto:[log in to unmask]
Com: (478) 926 - 5224
Fax: (478) 926 - 4911
DSN Prefix: 468
-----Original Message-----
From: Patrick Lam [mailto:[log in to unmask] ]
Sent: Friday, January 11, 2002 5:12 PM
To: [log in to unmask]
Subject: [TN] Remove unused "dead" pads on internal layers
Hi TechNetters,
For class 3 boards, is it acceptable to have unused pads removed
on
interanal
layers.
Thanks,
Pat
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