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January 2002

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Subject:
From:
"Marsico, James" <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Tue, 15 Jan 2002 07:54:54 -0500
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It seems like the consensus is not to use "plated shut" vias in my design
(thermal vias, if you recall), but to fill the vias with a thermally
conductive adhesive (CB10?) and copper plate over the top.  Now the
questions are, what other conductive adhesives are out there that can be
plated over, and which board shops can do this (low volume, class 3)?  I
know that ALL board shops CAN do everything, but I'm really interested in
those who HAVE done this with good success.

Thanks again,
Jim Marsico
Senior Engineer
Production Engineering
EDO Electronics Systems Group
[log in to unmask] <mailto:[log in to unmask]>
631-595-5879

        -----Original Message-----
        From:   Don Vischulis [SMTP:[log in to unmask]]
        Sent:   Thursday, January 10, 2002 5:18 PM
        To:     [log in to unmask]
        Subject:        Re: [TN] VIAS PLATED CLOSED

        Jim

        IMO you should avoid true plated shut vias.  As holes plate in an
        electrolytic process, the outer portion of the hole plates faster
than the
        portion of the barrel that is near the center of board (dog bone
plating).
        This can result in trapped chemicals in the barrel of the hole.  As
an
        alternative you might consider plugging the holes with a conductive
epoxy
        such as DuPont's CB100.  A .021 dia hole in a .062 thick board is
within the
        capability of several board shops.  You will most likely find this
        capability with shops that build high reliability products.

        The holes are plugged before the final finish is applied, and they
should
        provide a flat final surface on the finished board.

        Don Vischulis

        -----Original Message-----
        From: TechNet [mailto:[log in to unmask]]On Behalf Of Marsico, James
        Sent: Thursday, January 10, 2002 3:55 PM
        To: [log in to unmask]
        Subject: [TN] VIAS PLATED CLOSED


        Good day technet:

        We're considering designing a multilayer polyimide PWB with a number
of vias
        (approximately .021" diameter holes, .062" thick PWB) that are
plated shut,
        for thermal reasons.  Can anyone comment on pitfalls regarding the
fab
        process?  How about voids in the solid copper via?  Entrapped
plating
        solution?

        All comments are appreciated.  Thanks in advance...

        Jim Marsico
        Senior Engineer
        Production Engineering
        EDO Electronics Systems Group
        [log in to unmask] <mailto:[log in to unmask]>
        631-595-5879


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