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Ted
Check the Technet Archives. There's been ample discussion on the topic
there. Further, Jim Blankenhorne published an article on the topic in
"Printed Circuit Design" 10/98.
Dave Fish
----- Original Message -----
From: "Ted Tontis" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Tuesday, January 15, 2002 10:28 AM
Subject: [TN] VIA in pad
> We are working on a new design that might be a candidate for HDI.
I
> have never had the opportunity to do such a design, but have read plenty
of
> articles regarding this approach. The main concern is that the engineers
> want to place a 8-10 mil VIA's in the pads. I have explained to them that
> this will cause soldering problems not mention contamination problems.
What
> is the cost benefit over laser drilled micro VIA's vs. conductive epoxy
> filled vias in pads. Can a VIA survive the reflow and still be defect
free?
> Are there other concerns that I should be addressing besides the above
> mentioned. Your input is greatly appreciated.
>
> Regards,
>
> Ted Tontis C.I.D.
> Engage Networks
> 316 N. Milwaukee Street
> Suite 214
> Milwaukee WI, 53202
> PH 414-273-7600 ext. 7607
> FX 414-273-7601
>
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