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December 2001

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Subject:
From:
Guy Ramsey <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Thu, 13 Dec 2001 15:16:11 -0500
Content-Type:
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text/plain (145 lines)
I have seen people mistake insufficient reflow temperature for insuffient
solder paste on this type part.

> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]]On Behalf Of My Nguyen
> Sent: Thursday, December 13, 2001 1:11 PM
> To: [log in to unmask]
> Subject: Re: [TN] Inefficient solder on Toshiba micro BGA
>
>
> Hello,
> Since I cannot get a very clear picture from your
> email, I can only provide some hints for your
> reference:
>
> 1. Verify aspect ratio>=1.5 and area ratio>=0.66: I am
> not sure what does that mean?
> 2. Try type 4 solder paste: We currently use type 3
> No-Clean solder from Kester.
> 3. Make sure PCB have no wicking problem.  The Rambus
> PCB are bought from the shell on the market.
> 4. PCB solder pads have acceptable solderability: They
> are gold plated and contaminated free.
> 5. If PCB is ENIG finish, make sure there is no "Black
> Pad" defect: I need more education about the term
> "ENIG" and "Black Pad"
> 6. PCB bow and twist in with specs (>.7 preferred).
> They are within spec.
> 7. If CSP solder ball is 63Sn/37Pb, than I think
> solder paste is not a key point for open solder joint
> : It is 63Sn/37Pb, no clean solder paste from Kester.
> 8. Verify your reflow profile is within the specs
> (according to solder paste vendor) They are in spec.
> 9. Cross-section to verify the IMC layer is in
> standard thickness: We did cross section them and
> found out the in-sufficient solder join or even NO
> solder join at all on a few pads.
> 10. The pads on PCB should be a copper defined instead
> of soldermask defined to prevent potential crack: They
> are gold-plated.
> 11. Pay attention to your process to verify NO
> excessive tension to your board (e.g. depanel, handle
> etc.): We use DEK 265 series to (Horizon and
> Infinitive models) print the solder.  Printing at
> 15-20 mm/s.
> 12. Try to find where the open have (before wave or
> after). If via hole under CSP haven't been plugged,
> wave solder sometimes can cause open by remelt the
> solder joint: The in-efficient solder firstly found
> after screen-printing.
> 13. Ask your component/PCB vendor to do the failure
> analysis, they maybe have much more experience than
> you: We are trying.
>
> Hope this helpful. It is helpful.  However, we still
> need more information.  Until this moment, we still
> think solder paste, stencil apperture, print speed and
> pressure, and the stencil thickness could be the
> cause.  We are not sure yet.
>
> Best regards,
>
> > -----Original Message-----
> > From: My Nguyen [ mailto:[log in to unmask]
> > <mailto:[log in to unmask]> ]
> > Sent: Wednesday, December 12, 2001 2:43
> > To: [log in to unmask]
> > Subject: [TN] Inefficient solder on Toshiba micro
> > BGA
> >
> >
> > Hello all,
> >
> > Problem description:
> >
> > Been happening on Rambus - part number tc59rm81xmb.
> > Ball diametter: 0.5 mm; ball pitch: 0.8 mm, ball
> > height: 0.4 mm. Pad size: 0.3 mm (11.5 mils)
> > 5-10% of the time (we run huge amount of them)
> > failure modules came from opening soder join or no
> solder join
> > at all.  As we inspect the screen printing process
> > (we
> > use 5 mils stencil - Dek screenprinting, cleaning
> > rate: 2 per print, cleaning cycle Wet-Vacuum/Dry),
> > we
> > found un-event solder deposit.  Some pad even has
> > very
> > little solder or no solder at all.
> >
> > Stencil is electro-polish;  Diamond shape aperture,
> > 13.5 mils open used trapezoid shape.
> >
> > We afraid that if we open the apperture bigger, then
> > we may have bridging or solder ball.  If we reduce
> > the
> > stencil to 4 mils to reduce the blockage or
> > resistance, then we may have in-efficient solder or
> > many other problem relating thin stencil (damage,
> > short-life, etc)
> >
> > What would be your solution?
> >
> > Thanks,
> >
> > Stacy
> >
> >
>
> > ATTACHMENT part 2 image/gif name=std_logo.gif
>
>
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