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December 2001

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Subject:
From:
Lucas Paul-R32425 <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Wed, 12 Dec 2001 16:25:01 -0700
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text/plain (41 lines)
Andre,

Is there clearance around the capacitor? If there is, why not lay the part flat on its side with the legs parallel to the board and then form the leads to fit the holes? It will take several bends to align to the hole and another bend to put the leads down into the hole but,the part will be flat against the board and there will be no stress on the leads at the body part.

Paul

-----Original Message-----
From: Andre Leclair [mailto:[log in to unmask]]
Sent: Wednesday, December 12, 2001 6:26 AM
To: [log in to unmask]
Subject: [TN] To form or not to Form


Hi all
I hope this gets some good advice.

I have a customer who is requiring the placement of an electrolitic cap
that has a lead spacing of 0.140" and the PCB has 0.100".  They do not want
the leads formed, they want the part flat to the board.  In doing this, am
I opening myself up to stress induced failures of the component.

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