Hi, Michael,
Thanks very much indeed for your input, even though it looks as though
you're confirming my worst fears. I made a phone call to the States
specifically on the grinding issue on Tuesday morning, as I was concerned,
not about stretch, as I didn't know to consider that, but about the risk of
over-doing it and removing pads or making them too thin.
I honestly believe that the design itself is balanced in terms of copper
distribution, as I calculated the copper volume for each layer and compared
each to its opposite number in the stack-up. But I see and understand that
the increasing weight on the outer layers with the number of sequential
plating processes could warp those layers already laminated. I was crossing
my fingers and hoping that the opposing bows of the two halves of the board
would cancel each other out and relieve the stresses in the final pressing
that joins them together. Is that being naive?
I'll warn our fab house about the stretch and registration issues, and note
their response. That is a real concern, though having said that, all the
boards on this project have a grinding operation to level silver epoxy in
the thermal vias with the surface of the board, and those boards have been
very successful, albeit all the holes are through-holes (no blinds apart
from these two boards).
The fab house's current attempt is their third - the second one took them
(via a subcontractor) into laser drilling for the first time, and it was a
disaster. Every board failed electrical test big time with missing
connectivity, and drilling too deep and contacting other layers. Put me off
laser drilling rather, though I understand from fab houses with more
experience of this that after some practice it is a very reliable process,
as are the subsequent plating operations.
The bottom line is that we didn't know enough about the pitfalls with this
type of design to take steps to counteract them. We learn the hard way, but
still have to get the darned things made somehow!
My profound thanks again for taking the trouble to write.
Best regards
Peter
ST Aerospace
"Mcmaster,
Michael" To: [log in to unmask]
<michaelm@MER cc: (bcc: DUNCAN Peter/Asst Prin Engr/ST
IX.COM> Aero/ST Group)
Sent by: Subject: Re: [TN] Over-etch
TechNet
<[log in to unmask]
ORG>
11/22/01
08:49 AM
Please
respond to
"TechNet
E-Mail
Forum."
Peter
I think we now know why you've had warpage problems on the other boards.
Building up unequally thick sequentially laminated parts then laminating
them together is likely the underlying asymmetry that's warping the boards.
Even if in the final stackup appears symmetric the fact that the "building
blocks" were unbalanced is enough to warp the final boards.
By the way, I think 7 weeks seems about right for building something like
this the first time. If at all possible, I'd try to simplify the structure
to reduce the sequential lamination sequences. Laser microvias and
controlled depth drills can be helpful in doing this.
I saw from your other posting that your fabricator is going to try to grind
down the accumulated plating thickness. I don't want to dash your hopes
but
there is a fair amount of risk in doing so. One of the challenges in
building a multi-level board like this is understanding how the different
layers move through each level of the build. That's part of what takes 7
weeks. You have to build the board almost all the way through the process
to monitor and correct for the shifts that occur. On something this
complex
even the second pass might not be correct. Except for the line width
issues
your fabricator has presumably gone through this process and learned all of
this. But now they are going to grind off the plating. Unfortunately,
grinding also stretches the panel, which means the data they collected on
the previous builds likely won't be applicable. It's not unheard of to
have
1 mm or more of growth on a panel. I'm guessing your IL pads and
clearances
weren't designed to accommodate such misregistration. They'll likely have
to re-characterize the movement of the board and re-size the IL
accordingly.
Good luck, but don't be surprised if the first re-build has some
registration issues.
> ----------
> From: <Peter George Duncan>[SMTP:[log in to unmask]]
> Reply To: TechNet E-Mail Forum.
> Sent: Sunday, November 18, 2001 10:24 PM
> To: [log in to unmask]
> Subject: Re: [TN] Over-etch
>
> Hi, Edward,
>
> The heavy copper weight resulting from all these plating processes was
> recognised early on, but a) we assumed it would be reasonably even across
> the board surface, and b) was not so heavy that the required widths and
> spacings couldn't achieved after final etch. Certainly it wasn't flagged
> up
> to us by the fab house as being a problem.
>
> A very similar board was made by another fab house with no problem, apart
> from the boards being warped. The etching was fine - it's just that they
> took 7 weeks to make them on priority, which we couldn't afford again.
>
> Hmmm! The things we have to find out the hard way.
>
> Peter Duncan
>
>
>
>
>
> Edward
>
> Szpruch To: [log in to unmask]
>
> <edward@ELTEK cc: (bcc: DUNCAN Peter/Asst
> Prin Engr/ST
> .CO.IL> Aero/ST Group)
>
> Sent by: Subject: Re: [TN] Over-etch
>
> TechNet
>
> <[log in to unmask]
>
> ORG>
>
>
>
>
>
> 11/18/01
>
> 03:08 PM
>
> Please
>
> respond to
>
> "TechNet
>
> E-Mail
>
> Forum."
>
>
>
>
>
>
>
>
>
> Peter,
> Let me refrase your question from plating point of view since you rised 1
> milion dollar question:
> How to plate the holes without plating the surface.
> As far as I know,the best equipment,the best technologies,the best
> chemistry
> etc have limitited capacity in terms of throwing capability ( ratio of
> metal
> plated inside the hole to metal plated on the surface).The best figure is
> slighty above 1.0 , usually is less than 1.0 .
> No magic in this area:if the design requires to plate 3 times at least 20
> microns or so in the holes, the surface will get additional around 60 -70
> microns of copper before plating and etching of the final pattern.
> PCB designer should know this basic fact of life while imposing fancy
> construction.
> Of course PCB manufacturer has some possibilities to manipulate artwork
> compensations according to copper thickness to be etched, but etching
> factors are also fact of life.
> There are some tricky ways,but most of them are not working well on HDI
> boards with fine lines.
> Edward
>
> Edward Szpruch
> Eltek Ltd
> P.O.Box 159 ; 49101 Petah Tikva Israel
> Tel ++972 3 9395050 , Fax ++972 3 9309581
> e-mail [log in to unmask]
>
> > -----Original Message-----
> > From: <Peter George Duncan> [SMTP:[log in to unmask]]
> > Sent: ו נובמבר 16 2001 10:04
> > To: [log in to unmask]
> > Subject: Re: [TN] Over-etch
> >
> > Hi, Rudy,
> >
> > The boards are ENIG finished, the ENIG plating being carried out
> > post-solder-mask, which must be after final copper etch, so No, there
is
> > no
> > other metal in the area, unless my understanding of the plating/etching
> > sequence is all wrong. My understanding (faulty or otherwise) of what
> the
> > fab house has done, is that they laminate, drill and plate the layers
> with
> > the first suite of blind vias, then laminate, drill and plate for the
> > second suite of blind vias, then again for the 3rd suite until
> everything
> > is stacked up, pressed, drilled and plated for the through-holes. I
> > haven't
> > quite been able to make sense of it all yet, but I think what I'm being
> > told is that the plating becomes "stepped" somehow. I have 3 sets of
> blind
> > vias from each outer surface (for ease of argument), making 4 plating
> > sessions on each side by the time the through-hole group is done. The
> > first
> > areas to be drilled and plated are therefore plated 4 times, while the
> > last
> > areas to be drilled are only plated once, with the groups in between
> > getting their proportional share of multiple plating.
> >
> > Thus at final etch, there is, I am told, a compromise to be reached -
> how
> > to achieve the correct widths and spacings on the heavily plated areas
> > without over-etching the lightly-plated areas. In my simple way, I
would
> > have expected the entire board surface to have an even plating
> thickness,
> > however thick, but seemingly not. The compromise hasn't worked for the
> > number of blind via groups featured in this board, and I need to try to
> > find out how to address a solution without solely relying on what our
> fab
> > house tells me.
> >
> > In my entire life, I never had to worry about the processes involved in
> > fabricating PCB's - only that components could be soldered to them,
that
> > they passed test and proved to be reliable in the field. I only ever
> > worked
> > with good boards - the ones that passed in-coming inspection - in an
> > assembly environment, so my experience of board design and PCB fab is
> > limited to the past 8 or 9 months, in a company that has no previous
> > convictions for designing this type of board, so it's a case of the
> blind
> > leading the blind to a certain extent.
> >
> > Any further help in this area would be greatly appreciated.
> >
> > Best regards
> >
> > Peter Duncan
> >
> >
> >
> >
> > "<Rudy
> > Sedlak>" To: [log in to unmask]
> > Sent by: cc: (bcc: DUNCAN
Peter/Asst
> > Prin Engr/ST
> > TechNet Aero/ST Group)
> > <[log in to unmask] Subject: Re: [TN]
Over-etch
> > ORG>
> >
> >
> > 11/16/01
> > 02:13 PM
> > Please
> > respond to
> > "TechNet
> > E-Mail
> > Forum."
> >
> >
> >
> >
> >
> >
> > Peter:
> >
> > I am not sure if I fully understand the process you are using....so I
am
> > going to ask a dumb question, that may shed some light on the issue...
> >
> > Is there, anywhere in electrical contact with Copper being etched any
> > other
> > metal excepting Tin?
> >
> > This sort of thing, selective over-etch, is classically seen when there
> is
> > some other metal, (Nickel, Gold, or???) than Tin in electrical contact
> > with
> > the over-etched Copper, and also in contact with the etchant.
> >
> > And if I am completely out in space with this question, please forgive
> the
> > intrusion.
> >
> > Rudy Sedlak
> >
> >
>
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