A very big thanks to you all, especially Edward, Rummy, Hans, Jeff, Moonman
and many others for all the help and advice I've received on this topic. In
spite of Moonman's reaching near-critical mass to start with, this thread
became a rope, so there was obviously a lot of information and several
issues that were worth sharing.
I had a long and expensive discussion by phone with the fab house this
morning and they're proceeding with conventional sequential lamination of
the boards with selective plating of holes and pads. At each stage they
will grind the plated copper off the pads on each side of the laminated
stack to maintain thickness until they get to the final, through-hole
group, where the plating will be left to bring the outer surface copper
weight up to intended design thickness. They are now very confident about
being able to produce good boards, though why they couldn't have done all
this to start with and saved me a lot of grief and black marks, I can't
say.
I will follow up Hans's lead on plating holes only, not surface pads, as
this would obviously be an ideal solution for this type of board, as long
as the hole plating still connects well with the inner edge of the pads on
the outer layers. It sounds as though it will save a lot of process time
and reduce risk by removing the unnecessary filling and grinding
operations, which are what has extended the time of the third attempt to
make these boards.
I join those who have gone before me in being in the position of having
received tremendous support, and no small amount of valuable help. My
heartfelt gratitude and thanks to all the TNagers for their generosity.
Peter Duncan
Hinners Hans M Civ
WRALC/LUGE To: [log in to unmask]
<Hans.Hinners@ROBI cc: (bcc: DUNCAN Peter/Asst Prin Engr/ST
NS.AF.MIL> Aero/ST Group)
Sent by: TechNet Subject: Re: [TN] Over-etch II
<[log in to unmask]>
11/20/01 02:09 AM
Please respond to
"TechNet E-Mail
Forum."
Hello Peter!
There are several ways to skin this cat (plating-etch dilemma) and it
depends on where you look for the answer.
Short Term - Etch: Assuming there is some uniformity to the thicker copper
plating it could be etched in a double pass
Image-Develop-Etch-Strip-Repeat.
We used to etch the outer portion of the core where the plating was thicker
and then go back to etch the finer circuitry during a second pass. The
down
side was adding processing steps and more handling.
Medium Term - Plating: If the plating distributions are design related then
the plating line needs to be tweaked. Pulse and Reverse -Pulse Plating can
do some amazing things but it takes development time to dial-in.
Long Term Alt. Plating: There are alternatives to Electroless Cu that only
plate the drilled hole not the surface copper. Where's Michael Carano
hiding? He can answer that one in his sleep.
And as you know, once it's over etched your done.
Hans
Integrity First - Service Before Self - Excellence in All We Do
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Hans M. Hinners
Electronics Engineer
Warner Robins - Air Logistics Center (WR-ALC/LUGE)
Special Operations Forces System Program Office (SOF - SPO)
Gunship Team
226 Cochran Street
Robins AFB GA 31098-1622
mailto:[log in to unmask]
Com: (478) 926 - 5224
Fax: (478) 926 - 4911
DSN Prefix: 468
-----Original Message-----
From: <Peter George Duncan> [mailto:[log in to unmask]]
Sent: Sunday, November 18, 2001 10:07 PM
To: [log in to unmask]
Subject: Re: [TN] Over-etch II
Hi, Rudy,
Assumption is correct - over-etch occurs in the same place on all boards of
the same design, and is on the patterns. Masked traces are in good
condition. Fab house has not suggested a change of design as a solution to
the problem - in fact they didn't even want the over-etched boards back, so
my belief is that they knew about the problem even before they shipped the
product.
I myself need to learn a lot more about what is a produceable design and
what isn't as far as this sort of thing is concerned, though I would trust
that our board designers should know more about that than I. They
supposedly followed IPC-2221 & 2222 when putting the design together, but
who knows what was missed (if anything).
Does anyone else have this problem with boards with blind vias? Or if it's
DFM'd, what steps were taken to avoid this issue?
Best regards
Peter Duncan
"<Rudy
Sedlak>" To: [log in to unmask]
Sent by: cc: (bcc: DUNCAN Peter/Asst
Prin Engr/ST
TechNet Aero/ST Group)
<[log in to unmask] Subject: Re: [TN] Over-etch II
ORG>
11/16/01
11:23 PM
Please
respond to
"TechNet
E-Mail
Forum."
This MAY be so simple, we will wonder why/how they did not see the
problem...
To understand this analysis/suggestion, you have to understand the
difference
between pattern plating (which is done after photoresist application) and
panel plating (which is done before photoresist application).
Again, I am grasping/guessing here, as I really do not understand the
process
well enough to give "expert" advice....
If they are doing a "selective" panel plate, which would make the Copper
selectively thicker, this would be an obvious answer...
I assume that the over etch problem occurs at the same place on all the
boards of the same design? And it occurs on 100% of the boards of a
similar
design? (In other words, is the problem one of process/board design, or
one
related to equipment used in fabrication?)
If the problem is not always in the same place, this would speak to
equipment
issues at their facility...and even if the the problem occurs at the same
place on all boards, it could still POSSIBLY be equipment issues at the
fabrication facility.
Rudy Sedlak
RD Chemical Company
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