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November 2001

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Subject:
From:
Edward Szpruch <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Sun, 18 Nov 2001 09:08:05 +0200
Content-Type:
text/plain
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text/plain (176 lines)
Peter,
Let me refrase your question from plating point of view since you rised 1
milion dollar question:
How to plate the holes without plating the surface.
As far as I know,the best equipment,the best technologies,the best chemistry
etc have limitited capacity in terms of throwing capability ( ratio of metal
plated inside the hole to metal plated on the surface).The best figure is
slighty above 1.0 , usually is less than 1.0 .
No magic in this area:if the design requires to plate 3 times at least 20
microns or so in the holes, the surface will get additional around 60 -70
microns of copper before plating and etching of the final pattern.
PCB designer should know this basic fact of life while imposing fancy
construction.
Of course PCB manufacturer has some possibilities to manipulate artwork
compensations according to copper thickness to be etched, but etching
factors are also fact of life.
There are some tricky ways,but most of them are not working well on HDI
boards with fine lines.
Edward

Edward Szpruch
Eltek Ltd
P.O.Box 159 ; 49101 Petah Tikva Israel
Tel  ++972 3 9395050 , Fax  ++972 3 9309581
e-mail   [log in to unmask]

> -----Original Message-----
> From: <Peter George Duncan> [SMTP:[log in to unmask]]
> Sent: ו נובמבר 16 2001 10:04
> To:   [log in to unmask]
> Subject:      Re: [TN] Over-etch
> 
> Hi, Rudy,
> 
> The boards are ENIG finished, the ENIG plating being carried out
> post-solder-mask, which must be after final copper etch, so No, there is
> no
> other metal in the area, unless my understanding of the plating/etching
> sequence is all wrong. My understanding (faulty or otherwise) of what the
> fab house has done, is that they laminate, drill and plate the layers with
> the  first suite of blind vias, then laminate, drill and plate for the
> second suite of blind vias, then again for the 3rd suite until everything
> is stacked up, pressed, drilled and plated for the through-holes. I
> haven't
> quite been able to make sense of it all yet, but I think what I'm being
> told is that the plating becomes "stepped" somehow. I have 3 sets of blind
> vias from each outer surface (for ease of argument), making 4 plating
> sessions on each side by the time the through-hole group is done. The
> first
> areas to be drilled and plated are therefore plated 4 times, while the
> last
> areas to be drilled are only plated once, with the groups in between
> getting their proportional share of multiple plating.
> 
> Thus at final etch, there is, I am told, a compromise to be reached - how
> to achieve the correct widths and spacings on the heavily plated areas
> without over-etching the lightly-plated areas. In my simple way, I would
> have expected the entire board surface to have an even plating thickness,
> however thick, but seemingly not. The compromise hasn't worked for the
> number of blind via groups featured in this board, and I need to try to
> find out how to address a solution without solely relying on what our fab
> house tells me.
> 
> In my entire life, I never had to worry about the processes involved in
> fabricating PCB's - only that components could be soldered to them, that
> they passed test and proved to be reliable in the field. I only ever
> worked
> with good boards - the ones that passed in-coming inspection - in an
> assembly environment, so my experience of board design and PCB fab is
> limited to the past 8 or 9 months, in a company that has no previous
> convictions for designing this type of board, so it's a case of the blind
> leading the blind to a certain extent.
> 
> Any further help in this area would be greatly appreciated.
> 
> Best regards
> 
> Peter Duncan
> 
> 
> 
> 
>                     "<Rudy
>                     Sedlak>"             To:     [log in to unmask]
>                     Sent by:             cc:     (bcc: DUNCAN Peter/Asst
> Prin Engr/ST
>                     TechNet              Aero/ST Group)
>                     <[log in to unmask]        Subject:     Re: [TN] Over-etch
>                     ORG>
> 
> 
>                     11/16/01
>                     02:13 PM
>                     Please
>                     respond to
>                     "TechNet
>                     E-Mail
>                     Forum."
> 
> 
> 
> 
> 
> 
> Peter:
> 
> I am not sure if I fully understand the process you are using....so I am
> going to ask a dumb question, that may shed some light on the issue...
> 
> Is there, anywhere in electrical contact with Copper being etched any
> other
> metal excepting Tin?
> 
> This sort of thing, selective over-etch, is classically seen when there is
> some other metal, (Nickel, Gold, or???) than Tin in electrical contact
> with
> the over-etched Copper, and also in contact with the etchant.
> 
> And if I am completely out in space with this question, please forgive the
> intrusion.
> 
> Rudy Sedlak
> 
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