Jeff, thanks for the response... I'm sending this to you directly because
I'm having trouble sending anything to IPC. (Maybe this will get through,
who knows!)
What about PWB design/fab techniques. Does thinner lines, microvias, buried
vias, embedded discretes, etc. affect signal speed? What about a 'power
mesh architecture' technology?
We're presently in production with a polyimide multilayer PWB which has an
MCM at 560 MHz. We think we're pushing the limit. Our next generation
designs might be up to I gig... I'm looking for board materials, designs,
etc. to accommodate.
Thanks again,
Jim Marsico
Senior Engineer
Production Engineering
EDO Electronics Systems Group
[log in to unmask] <mailto:[log in to unmask]>
631-595-5879
-----Original Message-----
From: McGlaughlin, Jeffrey A [SMTP:[log in to unmask]]
Sent: Friday, November 16, 2001 8:15 AM
To: [log in to unmask]
Subject: Re: [TN] PWB MATERIALS, DESIGNS AND TECHNOLOGY
Not having seen any other responses to this posting I will take a
*SWAG* at it.
1) The clock speed is not the most damning part of the "high speed
design" problem. Look at the rise time of the primary signals on the board
and convert that in to frequency. Your speed issue is probably much worse
than you think.
2) The material properties that you need to be concerned about are
the dielectric constant (variable for FR4) and the loss tangent. The loss
tangent of the material becomes especially important when working with low
level signals and narrow noise to signal ratios.
3) There are several levels of solution you can explore to get out
of FR4 and in to a more stable material. The first are the PPO materials
like GeTek. They are an epoxy-glass material with the resin being highly
modified, to improve electrical and temperature performance. Next there are
the co-laminates like Speedboard N and C, prepreg only, which are used to
create a better final laminated board. Next in line would be the more exotic
ceramic-filled thermoplastics like Roger's RO4003/4350 materials.
Good Luck
Jeffrey A. McGlaughlin CID
Sr. Designer
Battelle Memorial Institute
Columbus Ohio
[log in to unmask]
-----Original Message-----
From: Stephen R. Gregory [mailto:[log in to unmask]]
Sent: Thursday, November 15, 2001 10:43 AM
To: [log in to unmask]
Subject: [TN] PWB MATERIALS, DESIGNS AND TECHNOLOGY
Hey Steve, for some reason IPC can't receive my e-mails.
Could you post
this for me?
Thanks,
Jim Marsico
Senior Engineer
Production Engineering
EDO Electronics Systems Group
[log in to unmask] <mailto:[log in to unmask]>
631-595-5879
-----Original Message-----
From: Marsico, James
Sent: Thursday, November 15, 2001 7:54 AM
To: 'Technet'
Subject: PWB MATERIALS, DESIGNS AND TECHNOLOGY
OK, here's another hi-tech topic...
What's the latest and greatest in multilayer board
materials
(organic?) and design that can handle clock speeds up to
1GHz? Or another
question, what aspects of the PWB affects signal speed?
Thanks,
Jim Marsico
Senior Engineer
Production Engineering
EDO Electronics Systems Group
[log in to unmask]
<mailto:[log in to unmask]>
631-595-5879
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