If the areas of blistering are isolated to the edges of ENIG plating the
issues may revolve around the ENIG process. It is very aggressive on the
interface of the copper and the LPI mask. The hydrogen gasses developed as
nickel is plated can attack any copper oxides present at the interface.
Mechanical agitation of the racks and perhaps virbation help to dislodge the
hydrogen build up from the lip of LPI mask deterring the attack.
Another aspect of this process that I utilize is to purposely undercure the
mask prior to ENIG and to complete the cure after ENIG.
Lifting of mask on ground plane areas may indicate improperly prepared
surface conditions prior to mask application.
I hope this is information worth sharing.
Russ Burdick
>From: Brian Ellis <[log in to unmask]>
>Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>
>To: [log in to unmask]
>Subject: Re: [TN] Exposed Copper Reliability Data
>Date: Sat, 29 Sep 2001 09:26:46 +0300
>
>Jana
>
>The first question to ask is why the solder mask is blistering. This is
>probably indicative of some form of contamination before it is applied.
>This contamination, if it is ionic, or partially so, may be an indicator
>that dendrite formation may occur under unfavourable circumstances. If
>so, the reliability may be reduced.
>
>IMHO, bare copper, if the circuit is clean, will not reduce reliability.
>After all, this finish was common in the past, before solder masks
>became common (pre-1970), with hand-soldered assemblies and no problems
>arose.
>
>Brian
>
>"Jana L. Carraway" wrote:
> >
> > I'm struggling with an exposed copper/reliability issue with Class 3
>(high
> > reliability) boards. We have a group of boards with some degree of
>Solder
> > Mask blistering, no Electroless Nickel/Immersion Gold plating in those
> > areas, which will result in exposed copper after assembly for the life
>of
> > the part. The effected areas are typically the junction of trace to pad
>or
> > the trace between SMT component pads. There are two concerns with this
> > condition: potential reduction of solder volume by increased copper area
>and
> > long term reliability with exposed copper. I have been able to
>demonstrate
> > that the degree of solder volume reduction is sufficiently small so as
>not
> > to affect solderability. However, I do not have reliability data that
>says
> > X amount of exposed copper will be acceptable or unacceptable.
> >
> > Can you guys help? Where can I find a/some studies regarding long term
> > reliability of exposed copper? Are there any papers available? Is such
> > data available with respect to different line widths and spacing or
> > different end use environments? Our geometries are "fine line" and the
> > application is "high reliability", but in a benign environment. Your
> > thoughts or references in this matter would be greatly appreciated.
> > Best Regards,
> > Jana Carraway
> > 503-579-8595
> >
> >
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