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October 2001

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From:
DUTTON Phil <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Wed, 17 Oct 2001 11:00:53 +1000
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text/plain (102 lines)
I've had a similar thing happen in the past.
I also use a 'layer build window' to allow a quick optical inspection of the
bare boards.
Just a clear area on the edge of the board with a number on each layer from
1 to n (this can include a revision code as well). You can hold the board up
to the light and see the build from left to right through the board. It is
possible to see the difference depths of the characters. I also include
'drawing number, issue, and layer' information on each layer, just outside
of the board perimeter in fairly large (0.100") text to make things as clear
as possible. (As well as the layer build diagram on my master drawing.)
Another possibility, in addition, would be to include a small copper feature
on each layer that gets exposed by the edge routing to indicate correct
layup sequence.

regards,

Phil Dutton C.I.D.


-----Original Message-----
From: Speers, Samuel @ CSE [mailto:[log in to unmask]]
Sent: Wednesday, 17 October 2001 6:13
To: [log in to unmask]
Subject: Re: [TN] PCB layers swapped


Genny,
Don't know about electrical test, but practice at our site since Genesis 1:1
has been to design in a "window" where the pattern revision of each layer is
visible. This enables you to see that the correct pattern rev. was used and
that they are laid up in the correct order.

Sam Speers

-----Original Message-----
From: Genny Gibbard [mailto:[log in to unmask]]
Sent: Tuesday, October 16, 2001 1:07 PM
To: [log in to unmask]
Subject: [TN] PCB layers swapped


Good morning,
My morning has not been so good.  I have a build of PCB's (over 300 boards)
where two inner layers have been swapped.  The board fabricator constructed
the board in the wrong order.  These boards are RF in nature and have
frequencies approaching 2GHz on them.  In many places we put a signal trace
on the inner layer furthest from the component side and then a wide grounded
trace over it on the closer inner layer as shielding.  So not only is there
no longer shielding over many traces, these signals are also about .03"
closer to the component circuitry than they used to be.  Can you contemplate
the nightmare of spurious issues that have been created?  We did not notice
the problem until they were fully populated and almost thru our testing
process and started failing one of the tests miserably.
Needless to say, we will be revising our inspection techniques to try to
catch occurrences like this much sooner.

I was wondering if anyone knows of a way that layer order could be
electrically tested for on a bare board, that we could require our
fabricator to complete?

Genny Gibbard (mailto:[log in to unmask])

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