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October 2001

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Subject:
From:
Neil Atkinson <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Mon, 8 Oct 2001 09:23:40 +0100
Content-Type:
text/plain
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text/plain (73 lines)
I have seen this in the past and you must be very careful during
de-panellising PCBs as well.

We banned 'v' scoring of FR4 surface mount PCBs because of the risk of
cracking surface mount capacitors. The time to failure can be anything from
hours to months depending on environment - temperature, moisture etc.

I have another question - has anybody out there seen chip capacitors fail
open circuit when operated in a circuit which runs quite hot?

Can the end caps become loose through temperature cycling causing the
capacitors to go open circuit at elevated temperatures?

Neil

-----Original Message-----
From: KK Chin [mailto:[log in to unmask]]
Sent: 05 October 2001 17:15
Subject: Re: Leaky Capacitors


We has banned manual soldering for leadless chip capacitors. Years ago we
experienced exactly the same problem. Microsectioning revealed that cracks
are
formed across several layers of the interleaved electrodes. Even bigger
problem
was that the cracked capacitor would not be detected in the initial test.
After
operating for a while, metal migrated across the crack and shorted the
layers.
We glad the problem was caught in burn-in rather than in the field. The
shorted
capacitor burnt some of our assemblies badly.

Manual soldering was not the only cause of capacitor cracking. AVX and Kemet
published some articles about precautions in design and assembly processes.

K.K. Chin
Artesyn Technologies,
Fremont, CA

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