TECHNET Archives

September 2001

TechNet@IPC.ORG

Options: Use Monospaced Font
Show Text Part by Default
Show All Mail Headers

Message: [<< First] [< Prev] [Next >] [Last >>]
Topic: [<< First] [< Prev] [Next >] [Last >>]
Author: [<< First] [< Prev] [Next >] [Last >>]

Print Reply
Subject:
From:
"<Peter George Duncan>" <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Mon, 1 Oct 2001 08:40:06 +0800
Content-Type:
text/plain
Parts/Attachments:
text/plain (284 lines)
Hi, Wolfgang,

Many thanks for your response. It seems that quite a lot of work is still
needed to "standardise" this area and pull it all together into some sort
of guideline, if not a spec. There are so many parameters that often
conflict with, or blow away completely, any idea of trying to achieve
reasonably tight control (at a reasonable cost) and consistency.

Does IPC have anything to say on this matter - Jack? Are you out there?

Peter Duncan



                                                                                                 
                    "Busko, Wolfgang"                                                            
                    <Wolfgang.Busko@BB        To:     [log in to unmask]                            
                    COM-HH.DE>                cc:     (bcc: DUNCAN Peter/Asst Prin Engr/ST       
                    Sent by: TechNet          Aero/ST Group)                                     
                    <[log in to unmask]>         Subject:     [TN] AW: [TN] solder reflow           
                                              question/pad sizes                                 
                                                                                                 
                    09/28/01 07:56 PM                                                            
                    Please respond to                                                            
                    "TechNet E-Mail                                                              
                    Forum."                                                                      
                                                                                                 
                                                                                                 




Hi Peter,

I see your "dilemma" and have made quite similar experiences.
In the case of uncertainty we decided to use the results of the
IPC-calculator after checking with the datasheet if these results make any
sense or if something related to assembly or rework requirements doesnīt
match.
Looking at the requirements for a good solderjoint you should be able to
judge if your results allow for what is needed.
Even if we are "absolutely sure" that we have the correct pads for a new
part already we check with the calculator results  and file the results
according to our quality system.
Looking at tolerances and their impact is a bit tricky and depends mostly
on
experiences ( normally bad ones).
I tend to look at worst case scenarios although life tells you that in most
cases you deal with nearly nominal values ( except for bare boards, the
normal given tolerance for over etching sometimes makes all your brainwork
useless). If you use bare board tolerances in your equation you should also
specify these tolerances when ordering the boards.
We also check
There are still some problems that canīt be solved that way because of lack
of experience with just very small structures or "new" technologies like
BGA
for example or something like that. In such a case I would recommend to
perform some tests with different shapes to see what fits best (DOE) and/or
look for information from suppliers, manufacturers and "big players". It
needs a bit more effort but it pays back.
Working close together with assembly may end in just your special pad
shapes
but thatīs still okay as long as others donīt have any problems with it if
you plan to outsource or change your supplier.

It was a long way from "there are not to be any tolerances from what I have
designed" to now "Okay, there are tolerances I have to take care of".
Final approval of designs takes place after first run and we now donīt have
nearly zero pad related redesigns.
However, that doesnīt save you from changes the manufacturer is doing to
their products due to different plants or machines he uses.

This may not be a definitive answer but thatīs how it looks like here.

Best wishes

Wolfgang

-----Ursprüngliche Nachricht-----
Von: <Peter George Duncan> [mailto:[log in to unmask]]
Gesendet am: Donnerstag, 27. September 2001 04:42
An: [log in to unmask]
Betreff: Re: [TN] solder reflow question/pad sizes

Hi, Rob,

I would have a look into pad sizes and footprints relative to the package
types in question. If they're too long for the contact length of the IC
pins and/or the footprint is too large (i.e. the pads start too far away
from the component body centre), the toe joint will be deficient of solder,
as the excessive pad area act as a solder thief. Conversely if the pad is
too short and/or the footprint is too small, the toe joint will also
deviate from the ideal.

I have had my own headaches recently with designers and routers not being
confident about how to define pad sizes on boards. The standard answer has
been "if there is a land pattern specified in the component data sheet for
a specific component, use that land pattern. If no land pattern is
specified, but the package type carries a JEDEC package number or RLP
(registered land pattern) number, then you can look up land patterns in
IPC-SM-782. Failing that, calculate them for yourself - so much for
international standards!

With apologies to Rob for usurping his question, I have a point and
supplementary question of my own to ask you good folks. My recent problem
is that IPC-SM-782 is not written around JEDEC package numbers, but more
around RLP numbers. Except in a very few instances, there is no
correlation/cross-reference between JEDEC nos and RLP nos in SM-782, and
precious few data sheets state the RLP number for the parts they cover.
It's more common to find JEDEC numbers in the data sheets, but even those
are in the minority among the large bundle of data sheets that document all
the components used on a board and most of them cannot be found in SM-782.
Mostly data sheets just give the package style (PLCC68, QFP160, etc) and
its dimensions, which can be looked up in SM-782, although when it comes to
TSSOP's and SSOIC's, SM-782 is no use whatsoever, as it doesn't cover them.

More often than not, you have to calculate your own pad sizes, because
manufacturers have their own variations on the standard component package
theme instead of sticking to a standard and making life a lot easier for
everyone. Pad size calculation can be done using formulae given in SM-782,
or there are calculators available either on-line on from the IPC site
where you plug in component dimensions and it gives you a land pattern in
return. We compared results using a very rare component - one that had a
land pattern in the data sheet AND whose JEDEC number was covered by SM-782
- between datasheet-specified land pattern, land pattern given in SM-782,
and calculation using SM-782 formulae and an IPC compatible calculator
taken from the Net. We found none of the results were very close to each
other, so we were at a loss as to which to choose.

There is a table 3-4 in SM-782, headed Chip Components, that gives solder
joint dimensions that the text in the spec says are applicable to all
electronic components. However, many data sheets beg to differ, so the
table is unreliable, and there's no other comparable information elsewhere
in SM-782.

My question (at last) is this: When you have to calculate your own pad
sizes for different components, most of the parameters required can be
lifted out of the data sheets, but how do you determine, or from where do
you obtain, the allowance needed for the heel and toe solder joints? They
differ considerably from one component type to another, judging by other
data sheet information, so I don't want to just use SM-782's universal
table, which seems to err on the stingey side anyway. What I thought would
be a science is still an art it seems. Can any of you wizards at board
design / layout / manufacture give a definitive answer on pad size
calculation? What parameters need to be considered when determining pad
sizes, apart from soldering process to be used?

Rob, Good luck with improving your joints and apologies again for
comandeering your question to raise one of my own.

TVMIA

Peter Duncan






                    Rob Day
                    <[log in to unmask]        To:     [log in to unmask]
                    COM>                 cc:     (bcc: DUNCAN Peter/Asst
Prin Engr/ST
                    Sent by:             Aero/ST Group)
                    TechNet              Subject:     [TN] solder reflow
question
                    <[log in to unmask]
                    ORG>


                    09/26/01
                    08:08 PM
                    Please
                    respond to
                    "TechNet
                    E-Mail
                    Forum."






Hello folks,

We have a problem with some IC's and solder quality on a board that we are
running.  The inspector told me we had problems with the toe solder joints.
The reflow throughout the rest of the board looks pretty good.  This solder
problem around the IC is not a consistent one. The solder is not
rejectable, but we would like it to look better.

I have tested our profile with some profiling tools and the profile is very
good.  Our paste is only 1 day old.  Could it be some of the pads on the
raw board?

Is there anything else that you folks would check as part of a typical
problem solving approach as I am relatively new to the industry.

Your comments would be greatly appreciated.


Thanks,

rob day

----------------------------------------------------------------------------

-----

Technet Mail List provided as a free service by IPC using LISTSERV 1.8d
To unsubscribe, send a message to [log in to unmask] with following text in
the BODY (NOT the subject field): SIGNOFF Technet
To temporarily halt delivery of Technet send the following message: SET
Technet NOMAIL
Search previous postings at: www.ipc.org > On-Line Resources & Databases >
E-mail Archives
Please visit IPC web site (http://www.ipc.org/html/forum.htm) for
additional
information, or contact Keach Sasamori at [log in to unmask] or 847-509-9700
ext.5315
----------------------------------------------------------------------------

-----





[This e-mail is confidential and may also be privileged. If you are not the
intended recipient, please delete it and notify us immediately; you should
not copy or use it for any purpose, nor disclose its contents to any other
person. Thank you.]

----------------------------------------------------------------------------

-----
Technet Mail List provided as a free service by IPC using LISTSERV 1.8d
To unsubscribe, send a message to [log in to unmask] with following text in
the BODY (NOT the subject field): SIGNOFF Technet
To temporarily halt delivery of Technet send the following message: SET
Technet NOMAIL
Search previous postings at: www.ipc.org > On-Line Resources & Databases >
E-mail Archives
Please visit IPC web site (http://www.ipc.org/html/forum.htm) for
additional
information, or contact Keach Sasamori at [log in to unmask] or 847-509-9700
ext.5315
----------------------------------------------------------------------------

-----

---------------------------------------------------------------------------------

Technet Mail List provided as a free service by IPC using LISTSERV 1.8d
To unsubscribe, send a message to [log in to unmask] with following text in
the BODY (NOT the subject field): SIGNOFF Technet
To temporarily halt delivery of Technet send the following message: SET
Technet NOMAIL
Search previous postings at: www.ipc.org > On-Line Resources & Databases >
E-mail Archives
Please visit IPC web site (http://www.ipc.org/html/forum.htm) for
additional
information, or contact Keach Sasamori at [log in to unmask] or 847-509-9700
ext.5315
---------------------------------------------------------------------------------





[This e-mail is confidential and may also be privileged. If you are not the
intended recipient, please delete it and notify us immediately; you should
not copy or use it for any purpose, nor disclose its contents to any other
person. Thank you.]
---------------------------------------------------------------------------------
Technet Mail List provided as a free service by IPC using LISTSERV 1.8d
To unsubscribe, send a message to [log in to unmask] with following text in
the BODY (NOT the subject field): SIGNOFF Technet
To temporarily halt delivery of Technet send the following message: SET Technet NOMAIL
Search previous postings at: www.ipc.org > On-Line Resources & Databases > E-mail Archives
Please visit IPC web site (http://www.ipc.org/html/forum.htm) for additional
information, or contact Keach Sasamori at [log in to unmask] or 847-509-9700 ext.5315
---------------------------------------------------------------------------------

ATOM RSS1 RSS2