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September 2001

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Subject:
From:
"Misner, Bruce" <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Wed, 26 Sep 2001 09:36:27 -0600
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Tim,

While we never design-in a stacked configuration, I have stacked components
in response to engineering changes on hi-rel hardware for years (decades
actually, ouch) with no failures attributed to stacking.  If there is a
significant size and/or CTE mismatch I would solder one termination and add
a #30 or #36 wire (or whatever current handling needs) to the other. You can
enhance mechanical strength with a thermally conductive adhesive as well, if
that is a concern.  Needless to say, you have to consider the quantity of
assemblies your dealing with, contractual requirements, etc.

Bruce Misner
> ----------
> From:         Tim Devaul[SMTP:[log in to unmask]]
> Reply To:     TechNet E-Mail Forum.
> Sent:         Wednesday, September 26, 2001 10:10 AM
> To:   [log in to unmask]
> Subject:      [TN] SMD chip stacking
>
> Good morning,
>
>      I am in the middle of a slight disagreement between a couple of our
> company's organizations. It is over stacking
> SMD chips, specifically 0603s. In a temporary rework fix engineering wants
> to stack and solder one chip directly on top of the other. Does anyone
> have any experience positive or negative concerning this practice?
>
> Tim DeVaul
> Quality Assurance Training and Audit Supervisor
> Philips Broadband Networks, Inc.
> 100 Fairgrounds Dr.
> Manlius, New York 13104
> Tel: (315) 682-9105 Ext. 2403
> Fax: (315)682-9006
> Email: [log in to unmask]
>
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