Jack,

In case you have not heard enough on this subject, here is my two bits. I
did nearly 4 years of prototype assembly as the Manufacturing Engineer. I
have heard nearly every explanation from the production floor for defects.
On the one hand you want perfect assemblies while on the other hand you need
to "learn" this assembly. You need to separate the process issues that are
layout/design/component in (customer) origin from those issues that
originate solely from your production process. For the customer generated
issues you need to feedback and recommend design/component changes so the
assembly can go to full production fly out the door.

As was stated in a previous email, many issues originate in the printing
process. Here stencil design is tantamount. It is best to have the PCB or a
solder sample to design the stencil because there are things on the board
that are best seen to be able to design for. In the beginning I left most of
the design of stencils to the stencil vendor. That quickly changed as most
of my customers went to a no-clean process and the avoidance of solder balls
became a major obsession. For no-clean I adjust every aperture to get the
proper volume and avoid solderballs. I adjust the apertures also for
printing error as well as stencil and PCB dimensional tolerances. I
recommend that you find what works or does not work with stencil design and
stick to it. Put it into your process to feedback so the new engineer and
the old engineer does not have to learn by screwing up.

Solder printing. Get a solder sample (a dead board or the one they took a
cross section of) or two. Make your first print on a solder sample and make
all your adjustments to it. In the no-clean process, cleaning a good board
and reprinting on it will surely result in solderballs in every nook and
cranny. I would also start [placing the chip parts that have attrition to
see if the pick&place program needs alignment. Alignment is a process error
that results in many of the tombstoning defects when all else is fine.

Profiling. Take your maybe partially loaded solder sample with its paste
still wet and use that for profiling which you can do while the "real"
boards are still being loaded. Or, ask the customer for a dead board that
you can use for profiling.

Finally produce a good DFM for the customer and/or get in contact with the
engineer in charge with the layout person they used and make design changes.
This is tantamount or the same mistake will come back in future designs. In
my experience design changes can take care of 75-100% of tombstoning errors.

Hope that helps,

Dorothy Lush
Senior Manufacturing Engineer

> ----------
> From:         Jack Crawford[SMTP:[log in to unmask]]
> Reply To:     TechNet E-Mail Forum.
> Sent:         Tuesday, September 18, 2001 11:19 AM
> To:   [log in to unmask]
> Subject:      Re: SMT Process Validation
>
> >>> Rich Lasko <[log in to unmask]> 09/18/01 12:56PM >>>
> Good afternoon everyone,
>
> We have been doing some smaller qty prototype or very low volume
> production
> runs (Qty 5-10pcs) on our SMT equipment.  We have been encountering some
> low
> yields at the SMT inspection for this type of production/prototype runs
> (They are nearly fixing each board for some reason or another).  The
> feedback that I am getting from that department is that they can not
> accurately "tweak" the process with this low number of qtys (by the time
> they get close to having the machine programs set, they have completed all
> the boards in that order).  So the next time we run the job, we continue
> to
> "tweak" the process in order to improve the yields.
>
> What this has caused us is some continuous rework at the end of the SMT
> line
> repairing the slid, shifted, or tombstoned components or incomplete solder
> reflow.
>
> Have any of you encountered a similar type experience and if so how was it
> handled in order to improve the yields?
>
> Thanks in advance for your help on this matter.
>
> Rich Lasko
> Badger Electronics
>
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