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September 2001

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Subject:
From:
Jack Crawford <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Wed, 19 Sep 2001 11:19:22 -0500
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>>> "Brooks,Bill" <[log in to unmask]> 09/19/01 10:23AM >>>

I attended one of Rick Hartley's seminars at PCB West in Santa Clara, CA. a
while back... He talked of creating a board stackup with the power and
ground planes very close together in the inner core of the material... thus
creating a bypassing capacitive effect for High speed logic boards. The
distance specified was like 2 to 3 mils apart. How would you go about
constructing a board with this feature in it? I have had a board
manufacturer tell me that 'the board would warp with all that prepreg in
it'... and the smallest core he had was 5 mil, could not get 3 mil. Is this
just a stackup configuration problem or is there more to it? Comments
welcome... :)

Bill Brooks 
PCB Design Engineer , C.I.D.
DATRON WORLD COMMUNICATIONS, INC
3030 Enterprise Court 
Vista, CA 92083 
Tel: (760)597-1500 Ext 3772 Fax: (760)597-1510 
mailto:[log in to unmask] 
IPC Designers Council, San Diego Chapter 
http://www.ipc.org/SanDiego/ 
http://home.fda.net/bbrooks/pca/pca.htm 

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