We have had great success with vias in pads, by establishing some rules.
NO vias in following component's pads.
    0603 and smaller,  components of any style where the pad has an area of less than 170
mils.
    No gull wing pin style ICs.
    Also we tend to place via on chip parts off center of pad towards center of part.
    Also we capture the bottom side (none solder side) of via with solder mask,  solder mask
    opening should be only large enough to clear drill (with some tolerance)

hope this helps.
Greg Scott
Cray Inc.


"Sklenar Vit (RBAU-BK/MGE4)" wrote:

> We had this design and did not like it despite of fact it saved a lot of PBB
> space. Problem was , especially for small chip packages ( 0603) that volume
> of vias barrel is comparable to volume of solder joint and this vias was
> "steeling" solder from solder joint accidentally ( during wave soldering).
> Result  - insufficient  or even missing solder joint.
>
> We do not have this layout  design anymore ..
>
> Regards
>
> Vit Sklenar MGE4VS
> T: (61 3)9541 7734  F: (61 3) 9541 3909
> e-mail work:   [log in to unmask]
> e-mail home:  [log in to unmask]
> > Robert Bosch (Aust) ,
> 1555 cnr.Centre and McNaugton Road,
> > Clayton , VIC 3169, Australia
> >
> >
> > -----Original Message-----
> > From: Ken Patel [SMTP:[log in to unmask]]
> > Sent: Thursday, August 09, 2001 4:53 AM
> > To:   [log in to unmask]
> > Subject:      [TN] VIAS in pads...
> >
> > Assemblers,
> > How robust is the VIA in the pad technology now? Can someone share the
> > process of handling board that has vias in pads?
> >
> > Most of our boards have VIAS in the pads and there is no way out.
> >
> > re,
> > Ken Patel
> >
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